According to Figure 1-3. S12X CPU & BDM Global Address Mapping, CS2 is active in global address range from 0x100000'G to 0x1FFFFF'G with internal EEPROM memory hole at 0x13F000'G..0x13FFFF'G. This further gives you two choices
1) use global memory addressing for any CS2 address 0x100000'G..0x13EFFF'G and 0x140000'G..0x1FFFFF'G,
2) below the address 0x140000'G, from 0x100000'G to 0x13EFFF'G you can use EPAGE memory window to access your device. To access one of these global address X, write ((X / 4096 ) & 0xFF) to EPAGE register and access data at nonbanked address ((X % 4096) + 0x800).
(Probably you have lots of external memory? Else it wouldn't make sense to interface external uart via external memory bus. S12XE with more SCI's or external SPI<->UART's are certainly easier to go)