ad7792 interface problem(urgent) please.......

[prashanterande]

Hello all,

i am trying to interface ad7792(16 bit adc) to mc9s12p128 uC

but my adc not get configured.

same adc i hv interface to mc9s08gt32 n working properly.

i think my problem in SPI initialization.

my configuration as  follows:

my initialization

/* irqcr=0xc0          ;for adc conversion complete

/* spi

/*spicr1=0x10     ;'

/*spicr2=0x5E         

/*spibr=0x77

i am trying to config adc as

/*  AN1+/AN-,differential inp,internal ref. both current source off. 0-100mv inp and continuous conversion mode

but i cant get external interrupt means conversion complete flag.

please help  me..!

[iggi]

Hello,

In your code, the SPI control register 2 is configured so the Transfer Width is 16bit, Bidirectional Mode is enabled (only one data line; MOSI on Master side), Mode Fault failure detection is enabled.

Try setting it simply as SPICR2=0x00; See if it works and then experiment other bits. The SPICR1 should be OK, but in the main function SPI must be enabled by setting SPICR1_SPE bit. After SPI init, the SPI system must be enabled just before a start of SPI Master transfer.

The SPIBR should be OK. You set the Rate Divisor = Prescaler Divisor = 7.

Note that:

- BaudRateDivisor = (Prescaler+1)*2^(Rate Divisor)

- Baud Rate = BusClock/BaudRateDivisor

The IRQ will be enabled by setting the IRQEN configuration bit, which is OK, and clearing the I-bit in the CPU condition code register. It is inhibited at reset so this pin is initially configured as a simple input with a pull-up.

Concerning the AD7792 device, if you have problems, contact Analog Devices support.

Regards,
Ivan

[prashanterande]

Hello sir,

Thanks for reply.

now my problem sort out. ADC works on low clock speed and MISO pin of uc get pulled up by internal pull up register."PERM" make this pin high.

But problem is that ADC gives me continuous interrupts, so my cpu always busy and disturb other interrupts.

In my project i am uses sci,timer chl 0 and irq interrupts.

timer chl 0 output compare interrupt occurred exact 1 ms for refreshing display. it works.

and sci works properly.

problem is in IRQ interrupt.

my Questions  are..

1. how we clear IRQ interrupt, means once interrupt occurredthen there is no provision to clear flag or ACK_BIT. to reset this.

2. Due to this max Speed IRQ interrupt my other  interrupts not working. get disturbances in display refresh.