XGATE registers on thread startup

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XGATE registers on thread startup

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P7
Contributor I
Hi All,
 
My MPU is MC9S12XDP512 (0L15Y).

I've tried to share some values in the XGATE registers between different threads (for efficiency), but it looks like all XGATE registers are cleared (except R1) on thread startup. I cannot find any documentation on this in data sheets, forums or the internet.

Am I correct?

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Steve
NXP Employee
NXP Employee
Hi,
  You are correct; this is the way that XGATE behaves. It's  described in the databook:
"Register R1 has an additional functionality. It is preloaded with the initial variable pointer of the channel’s service request vector (see Figure 6-20). The initial content of the remaining general purpose registers is undefined."
 On devices with XGATE V3 (S12XEP100 & others) register R7 is also pre-loaded with the contents of the shadow "SP" registers.
 
 The R1 behavior is very useful for optimising thread design.
 
 If you can share the idea of what you are trying to do then maybe we can suggest some other approach.
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P7
Contributor I
Hi Steve,
 
Ok, I've intepreted "The initial content of the remaining general purpose registers is undefined." as being undefined after power on, and not at every thread start.
 
I'm interfacing to a Homeplug chip with a GPSI interface using 2 SPI's. The XGATE can handle the transmit/receive interrupt fine, but I also tried to calculate the 32 bit CRC while transmitting. Because I have only 2 XGATE interrupts running, it seemed possible to keep the 32 bit intermediate results and some pointers in the XGATE registers (when the XGATE becomes idle after RTS).
 
I'm using a S12XDP512 with XGATE V2, for now I let the S12 calculate the CRC before transmitting and maybe I will switch to an S12 with XGATE V3 so a receive interrupt maybe handled while calculating the CRC....
 
Thanks.
 
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Steve
NXP Employee
NXP Employee
Ok, I understand, it's an interesting idea.
I was thinking about using the R1 pre-load to help a bit but with a 32-bit CRC you don't save that much.
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