What´s wrong with the MM9Z1_638 Wake-Up function?

[m3]

Hi all,

I´m trying to wake up a sleeping MM9Z1j638 (OPM==01; S12Z STOP) using TIMER3 / PTB3 but without luck.

I can see some current peak after about 10s but no more activity. Wake-up Using WUCTH will work before and after the  10 seconds.

This is the related code is use:

B_GPIO_CTL =  B_GPIO_CTL_DIR3M_MASK | B_GPIO_CTL_DIR3_MASK \

| B_GPIO_CTL_PE4M_MASK | B_GPIO_CTL_PE4_MASK;

B_GPIO_OUT3_WKUP = 1;

B_GPIO_OUT3_TCOMP3 = 1;  

B_TIOS_IOS3 = 1;

B_OC3M_OC3M3 = 1;

B_TCTL1 = 0xC0;

B_TC3 = B_TC3 + 0x2710;          // reload 10s

B_TFLG1_C3F = 1;

B_PCR_WUE_WUPTB3 = 1;

...

B_INT_MASK = 0x0000;

IrqEnable();

__asm(STOP);

So whats wrong with it?

Thanks,

Michael.

[Q_man]

Hi,

the wakeup is triggered by the rising edge of the internal PTB3 signal therefore its required to ensure the internal PTB3 is low. Important to notice is that the timer clock is changing in low power mode. To get exact timing the Timer should be disabled, configured ... Entering Stop mode will then enable the Timer.

can you try the following code:

// PTB3 must be set to output

B_GPIO_CTL =  B_GPIO_CTL_DIR3M_MASK | B_GPIO_CTL_DIR3_MASK;

// route Timer OC3 to PTB3

B_GPIO_OUT3_WKUP = 1;

B_GPIO_OUT3_TCOMP3 = 1;  

// set Timer Ch3 to OC

B_TIOS_IOS3 = 1;

B_OC3M_OC3M3 = 1;

// force internal PTB3 to low

B_TSCR1_TEN = 1;

B_TCTL1 = 0x80;                   // clear on OC

B_CFORC_FOC3 = 1;          // force OC

B_TSCR1_TEN = 0;

// setup a rising edge in 10s

B_TCTL1 = 0xC0;          // set on OC

B_TC3 = B_TC3 + 0x2710;          // reload 10s

B_TFLG1_C3F = 1;

//enable wakeup on ptb3 (rising edge)

B_PCR_WUE_WUPTB3 = 1;

...

W.

[iggi]

Hi,

Are you sure the MCU goes into Stop mode?

what about clearing the S bit in CPU CCR register prior to asm STOP instruction? You don't have that line in the code:

asm ANDCC #0x7F;  //clear S bit - enable the stop mode.

/* If the S bit is not cleared then STOP instruction has no effect and is executed as a dummy instruction NOP. */

asm STOP;

Regards,

iggi

[m3]

Yes, i´m pretty sure about that. i just have not included the ANDCC and PCR house-keeping.

All signs show that it will go into STOP:

1. VDDH == Low (OK, more related to the Analog die)
2. Current <= 5mA,
3. OSC goes down.(actually i use pseudo-stop so this is currently no the case)
4. BDM not able to resume :-( (if i had set a Breakpoint at the D2D_Int() and apply some current to the shunt the debugger will come back to this point.)

Here is the missing part i use for clearing the S Bit:

B_ACQ_SRH = 0xFF;

B_PCR_SR =  0xFFFF;

B_INT_MSK = 0x0000;

B_PCR_CTL = OPM_SET_STOP;

__asm(ANDCC #0x6F)

__asm(STOP);

By the way, What really triggers the wakeup? Is it the state of the Output (OC3M->OC3Mx) or the Interrupt (TIE->CxI) from the Timer? And what settings other then PCR_WUE->PCR_WUPTBx, are really needed? According to Figure 33 on page 116, GPIO_OUTx->TCOMPx seems to be mandatory but what is about:

GPIO_OUTx->WKUP,

GPIO_OUTx->PTBx,

GPIO_CTL_DDRx and

GPIO_CTL->PEx?