Vref+ impedance on 9S12

[JohnnyP]

In my application, I set Vref+ to 2.55v from the wiper of a 10k pot, resulting in 10mv per bit.

In my HC11 designs, I padded the pot with 3.6k resistors in each leg.

I changed these to 51k in my S12 based design, and find that Vref+ is being pulled by the chip to about 1.3v.

Things work normally again when I change back to 3.6k resistors, but of course Vref is harder to set. Will buffer it in the next revision.

[bigmac]

Hello,

You do not say which model you are using.  Looking at a couple of data sheets, it would appear that the ATD reference current may be up to 0.375 mA per ATD block.  This would be very significant, even with 3k6 resistors, especially if the current may vary depending on ATD conversion value, and possibly temperature.

Even if you were to use a 1k pot and 360R resistors, the source impedance would still be approximately 430 ohms, i.e. producing a voltage drop of about 160mV, assuming a single ATD block.

Regards,

Mac