Hello,
I am trying to read of the registers in the MC33937 after a reset. The communication looks good, but the values that are returned from the MC33937 are not what I am expecting. Here is a scope shot of the communication:
According to the datasheet for the MC33937 I would expect after a reset:
register 1) 2) 3) 4)
expected 0x80 0x00 0xFF 0x00
getting 0x00 0x01 0x03 0x03
This is how I setup the SPI for the S12ZVMC in CW 11:
void InitSPI () {
/* SCI0CR2 = 0;
SCI0SR2 = 0x04; //Break Transmit Character Length
//SCI0BD = 833; //baud rate
SCI0CR1 = 0;
SCI0SR2_AMAP = 1; //Alternative Map limpia todo
SCI0ACR1 = 0x80; //Receive Input Active Edge Interrupt Enable*/
/* SCI0ACR2 = 0x04;
SCI0ASR1 = 0xFF;*/
/* SPI Control Register 1 */
SPI0CR1_LSBFE = 0; // MSB first
SPI0CR1_SSOE = 1; // enable Slave Select Output - enabled only in master mode
SPI0CR1_CPHA = 0; // 0: O=v i=^ 1: O=^ i=v
SPI0CR1_CPOL = 0; // SCLK idles at 0
SPI0CR1_MSTR = 1; // select SPI in master mode
SPI0CR1_SPTIE = 0; // enables SPI interrupt requests on SPTEF (Transmit Empty Interrupt Flag)
//SPI0CR1_SPE=1; //enable SPI module
SPI0CR1_SPIE = 0; // enables SPI interrupt requests on SPIF or MODF
/* SPI Control Register 2 */
SPI0CR2_SPC0 = 0; // enables bidirectional pin configurations
SPI0CR2_SPISWAI = 0; // SPI clock operates normally in wait mode
SPI0CR2_BIDIROE = 0; // output buffer disabled
SPI0CR2_MODFEN = 1; // /SS port pin with MODF feature
SPI0CR2_XFRW = 1; // 16 bit transfers according to MC33937 datasheet 8 bit command 8 bit answer
// Set the Baud Rate - Baud Rate = BusClock / BaudRateDivisor; BaudRateDivisor = (SPPR + 1) * 2^(SPR + 1)
SPI0BR = 0x0F; // BR = 16 MHz / 256 = 62500 <- 256 = (0 + 1) * 2^(7 + 1)
/*SPI System Enable Bit*/
SPI0CR1_SPE=1; //enable SPI module
}
and I am reading the registers like this:
/* MC33937 Commands */
#define NULL0 0x0000;
#define NULL1 0x0100;
#define NULL2 0x0200;
#define NULL3 0x0300;
#define CLINT0 0x6F00;
#define CLINT1 0x7F00;
void main(void) {
byte SPI0_SR;
word DataRegisterH;
word DataRegisterL;
busclk_init();
InitSPI();
EnableInterrupts;
// Set PAD7 as output and set low -> Reset on MC33937
DDRADL_DDRADL7 = 1;
PTADL_PTADL7 = 0; // within 77 ns (13MHz) in sleep mode
// wake up predriver -> remove /RST
PTADL_PTADL7 = 1;
// read SPI status registers
while(SPI0SR_SPTEF==0){}; // wait for the SPI Transmit Empty Interrupt Flag
SPI0DR = NULL0;
while(SPI0SR_SPTEF==0){}; // wait for the SPI Transmit Empty Interrupt Flag
SPI0DR = NULL1;
while(SPI0SR_SPTEF==0){}; // wait for the SPI Transmit Empty Interrupt Flag
SPI0DR = NULL2;
while(SPI0SR_SPTEF==0){}; // wait for the SPI Transmit Empty Interrupt Flag
SPI0DR = NULL3;
// clear all Interrupts -> CLIN0 and CLINT1
while(SPI0SR_SPTEF==0){}; // wait for the SPI Transmit Empty Interrupt Flag
SPI0DR = CLINT0;
while(SPI0SR_SPIF==0){}; // wait for the SPIF that data has been received
SPI0_SR = SPI0SR;
DataRegisterL = SPI0DRL;
DataRegisterH = SPI0DRH;
while(SPI0SR_SPTEF==0){}; // wait for the SPI Transmit Empty Interrupt Flag
SPI0DR = CLINT1;
while(SPI0SR_SPIF==0){}; // wait for the SPIF that data has been received
SPI0_SR = SPI0SR;
DataRegisterL = SPI0DRL;
DataRegisterH = SPI0DRH;
for(;;) {
__RESET_WATCHDOG(); /* feeds the dog */
//Write in SPI buffer
SPI0DR = NULL0; // Read Status Register 0 - latch bits
while(SPI0SR_SPTEF==0){}; //Wait until SPI data register is empty
//while(SPI0SR_SPIF==0){}; // wait für acknowledgement that data has been received
SPI0DR = NULL1; // Read Status Register 1 - mode bits
while(SPI0SR_SPTEF==0){}; //Wait until SPI data register is empty
//while(SPI0SR_SPIF==0){}; // wait für acknowledgement that data has been received
SPI0DR = NULL2; // Read Status Register 2 - maks bits
while(SPI0SR_SPTEF==0){}; //Wait until SPI data register is empty
//while(SPI0SR_SPIF==0){}; // wait für acknowledgement that data has been received
SPI0DR = NULL3; // Read Status Register 1 - dead time
while(SPI0SR_SPTEF==0){}; //Wait until SPI data register is empty
//while(SPI0SR_SPIF==0){}; // wait für acknowledgement that data has been received
} /* loop forever */
/* please make sure that you never leave main */
}
Anybody have an idea where I am going wrong here?
I appreciate any suggestions.
Regards,
John
Hello John,
Please try to change the SPI0CR1_CPHA bit to 1. The MC33937 uses the ‘Mode 1′ SPI protocol, which means that an inactive state of clock signal is low (CPOL = 0) and data are captured on the falling edge of clock signal and changed on the rising edge (CPHA = 1).
Also please double check that the timing is in accordance with the following specs:
I hope it helps.
Best regards,
Tomas
Hello Thomas,
Yes, I set for mode 0. I have misunderstood the timing diagramm and believed it was for mode "0" instead of mode "1" as you mentioned. Your explanation helped a lot. Thanks for that. As I am on holiday, I can first confirm when I am back, but I had to talk a look.
Regards,
John