S12XE ADC Continuous Conversion Coherency

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S12XE ADC Continuous Conversion Coherency

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pm3ball
Contributor I
I orginally implemented my application in a manner where AD conversions occurred always on a single channel per request basis, however, recently it has made sense to change to running the ADC in continuous scan mode due to changes in hardware architecture. As a result, I have configured the ADC to continuously scan channels 0-6 and wrap back to 0 in perpetuity. My question has to do with the coherency of the data contained within the ADC result registers. Since the ADC is running continously, the most desirable thing is that there are no interrupts to process the conversions. Since only result registers 0-6 are used, I have a routine that comes along and reads the correct result register based upon a parameter indicating the channel of interest. So, is there any issue with the situation where the ADC is writing to a result register as I am reading it? Please note that I am not worried about reading a "stale" value (i.e. the same value twice), but I am worried about something where the upper byte of the result is from the new conversion and the lower byte is from the old conversion, so my result is split in half across two conversions. I am assuming that this is not a possibility and that my code will work fine, but testing this is very inconclusive so if anyone can provide me some explicit assurance I would appreciate it.
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DPB
NXP Employee
NXP Employee

Hello

 

All bits of an ATD result register are loaded simultaneously with the conversion result, when the conversion is complete. The result registers never contain a value that is split across conversions. Thus if the ATD result register is read with a 16-bit aligned read, then there is no issue with reading a value split across 2 conversions.

 

DPB

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