Hi Pratibha,
The load okay bit, LDOK, enables loading the PWM generator with:
- A prescaler divisor—from the PRSC bits in PMFFQC register
- A PWM period—from the PWM counter modulus registers
- A PWM pulse width—from the PWM value registers
We typically do not update prescaler, period or duty during open loop mode. So, we do not need to PTUC_PTULDOK bit to 1 for motor commutation.
The motor commutation is typically managed by TIM0_OC0 event. See Table 1-21. Control Loop Events in RM. So, we may for example invoke commutation by:
TIM0CFORC_FOC0 = 1; // force commutation event (apply first commutation sector)
The next commutation events are managed by TIM0TC0 register update. For example:
TIM0TC0 = TIM0TCNT + NextCmtPeriod;
Or
TIM0TC0 = timeCommutation + NextCmtPeriod; // alignment + open loop
The PMF output signals are generated by per PMFCFG2, PMFOUTC_OUTCTL update in every commutation event (TC0 ISR). For example:
PMFCFG2 = 0x40 + MaskVal[NextCmtSector]; // will be applied at the next commutation
PMFOUTC_OUTCTL = OutCtl[NextCmtSector]; // will be applied at the next commutation
I hope it helps you.
Have a great day,
Radek
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