Hi,
I wonder what is the problem actually?
- i have to go with normal division which will result value with round off value or no decimal points
Could you please clarify this?
Optimized FP division on S12Z takes up to 300 bus cycles, ~9 us at 32 MHz. Any problem with this?
As Ladislav suggested most of real life needs for division are replaceable with multiply, .. and some shifts. And shifts are very fast on S12Z, thanks for barrel shifter, which was not available in HC12/S12 CPU's which had to loop shifting by one bit position at once. QMUL instructions further help making your calculation faster, even shifts may be often eliminated, and S12Z compiler supports __qmulXX intrinsic functions to make our life easier.
Edward