PIT in MC9S12XEP100

[harshitha_chiga]

Hi,

I am implementing a timer module for scheduler.

I found below code in the MC9S12XEP100 user manual.

CLR PITCFLMT                     ; disable PIT
MOVB #$01,PITCE                ; enable timer channel 0
CLR PITMUX                          ; ch0 connected to micro timer 0
MOVB #$63,PITMTLD0          ; micro time base 0 equals 100 clock cycles
MOVW #$0004,PITLD0          ; time base 0 eq. 5 micro time bases 0 =5*100 = 500
MOVB #$01,PITINTE              ; enable interupt channel 0
MOVB #$80,PITCFLMT          ; enable PIT
CLI ‍‍‍‍‍‍‍‍

My doubt is what is the function of "PITMTLD0" and "PITLD0" these registers?

Do they act as counters?

Can u explain me in-detail..

Thanks in advance..

Regards,

Harshitha C B

[dianabatrlova]

Hi Harshitha C B,

In the reference manual, the chapter 17.4.1 Timer could be helpful.

I attached the below excerpt from the RM. 

"As soon as a micro time base is selected for an enabled timer channel, the corresponding micro timer modulus down-counter will load its start value as specified in the PITMTLD0 or PITMTLD1 register and will start down-counting.

Whenever the micro timer down-counter has counted to zero the PITMTLD register is reloaded and the connected 16-bit modulus down-counters count one cycle.

Whenever a 16-bit timer counter and the connected 8-bit micro timer counter have counted to zero, the
PITLD register is reloaded and the corresponding time-out flag PTF in the PIT time-out flag (PITTF) register is set,

as shown in Figure 17-28.

The time-out period is a function of the timer load (PITLD) and micro timer load (PITMTLD) registers and the bus clock fBUS:

time-out period = (PITMTLD + 1) * (PITLD + 1) / fBUS."

I hope it helps you.

Best regards,

Diana