does not seem to make a difference. I believe I have it configured correctly, I see signals on the SPI lines going to the SBC.
I need to break out the logic analyzer and check the timing, and clock/edge stuff.
I tried adding the watchdog call in the main execution loop also, just in case. Still no joy.
All the CAN stuff is working in loopback mode, this is the only roadblock.
Thanks,
Bob