MSP430 to HCS12 > 2 Days and still no working interrupt for a SIMPLE program :-(

[pIx]

HI

I am studying in Alaska and have only experience with MSP430 and this time decided to use HCS12 (MC9S12DT256) for desire of more POWER. I got the LED to flash and stuff but having spend two days, I still couldn't get a simple program i.e. the SCI0 to work properly. All I want is to go into the interrupt service routine when a character is received.

I tried the solution mentioned by " rhinoceroshead" in another thread http://forums.freescale.com/freescale/board/message?board.id=16BITCOMM&message.id=1725. Not sure if I am doing it right though.

Below is my code. Please look at it as its very simple.

*********************************************************************

#include /* common defines and macros */
#include /* derivative information */
#pragma LINK_INFO DERIVATIVE "mc9s12dt256b" //The compiler put this here automatically!!

unsigned char TCHAR; //Received character placeholder

void main(void) {

COPCTL = 0; //Disabling Watchdog

SCI0CR1 = 0;
SCI0CR2_RE = 1; //SCI0 Receiver Enable
SCI0CR2_TE = 1; //SCI0 Transmitter Enable
SCI0CR2_RIE = 1; //SCI0 Receiver full interrupt enable

SCI0BD = 26; //For a 4MHz CLK, setting the Baud to 9600kbps

EnableInterrupts; //Enabling global interrupts

while(1){} //Just something so that the compiler does not exit the program
}

#pragma TRAP_PROC //my unsuccessful attempt at getting the program to jump here when a
void TEST() { //character is received
TCHAR = SCI0DRL;
}

*********************************************************************************

I am using the USB Multilink from P&E and CodeWarrior 4.5.

As mentioned by "rhinoceroshead" in another thread, when I put "VECTOR 20 TEST" or "VECTOR ADDRESS 0xFFD6 TEST" at the end of the P&E_Multilink_CyclonePro_Linker.prm file, I get the error message "Initializing of vector TEST failed because of over- or underflow of vector value". Am I putting it in the wrong place?

Don't know what I am doing wrong. Another issue is when I was sending characters from within the function main itself, I am getting garbage on hyperterminal. Really can't figure it out. The Baud is set correctly, 8 bit, no parity and 1 stop bit. It is not a issue with rewriting the TX Registers before shifting out because I was manually stepping the instructions one line at a time.

Thank you very much for taking the time in helping.

[CrasyCat]

Hello

Entries in vector tables are 16-bit wide. So you have to make sure your interrupt function gets allocated in non banked memory.

#ifndef __SMALL__
#pragma CODE_SEG __NEAR_SEG NON_BANKED
#endif
#pragma TRAP_PROC
void TEST(void) {
  TCHAR = SCI0DRL;
}
#ifndef __SMALL__
#pragma CODE_SEG DEFAULT
#endif

NON_BANKED section is allocated in non banked memory in the default linker command file we are delivering.

CrasyCat

[pIx]

CrasyCat,

Thank you so very much :smileyhappy:.. It is working fine now and the program is jumping into the interrupt service routine.

I don't know what they mean as of now and I have to spend some time figuring that out, but it is working perfect :smileyhappy:

I used the wizard to start my project and it did ask me about memory options to select. Is there any option that I can take there that will not require me to enter those extra lines of code? Also, do I have to do that before and after every interrupt vector routine function I create?

I apologize for these dump questions, but I never had to do stuff like these with the MSP430 on any of the three compilers I used for programming.

Thank you once again very much for helping me to get it work. I would have spend ages trying to figure it out on my own.

[J2MEJediMaster]

For a compiler option that might (emphasis on might) eliminate the need of those declarations, use the small memory model. The compile switch is: -Ms.

However, before you go rushing off to do that, you need to clearly understand the HC12's memory models and the implications to your code. I can do a core dump here, but it's best if you go consult Techical Note 207, which explains the several memory models the HC12 supports in great detail. The tech note is part of the document installation, which you may have skipped. See if you have a directory named Technical Notes, and if so, read tn207.pdf. Just in case, I'll upload the tech note here in case you can't find it.

If you do stick with the bank model, the answer is yes, you have to bracket every ISR with those pragmas to ensure that the routines are placed in non-banked memory.

---Tom

Message Edited by J2MEJediMaster on 2006-08-24 09:47 AM

[pIx]

Thank you for uploading the file. I have actually installed the Technical Notes, just haven't ever opened any. Thanks again.