We are using the S12Z (MC9S12ZVM family) for a critical automotive application.
The power supply via VSup of the board is directly connected to the battery/alternator of the car, so the input voltage is battery voltage to alternator voltage viz 12V - 14.5V
The system uses an on board power supply via a transistor using the BCLTC.
The BLDC 3phase motor is running under varying load and a such drawing about 0.5Amps to 3Amps.
It has been tested to run under this load on a simulated environment using a 12V power supply for days and it works without any problems.
It has been put in a car and used for days and never shows any issue.
However, in a car, sometimes it just stops. This is not a software issue because the simulator is running the same software for hundreds of hours at a stretch.
We are focusing on the power side of things at this point to determine the root cause.
If the issue was caused due to drop in voltage, it should be more likely to occur on the simulator which is running on a power supply compared to a car which is running on a battery and an alternator. We also considered that may be the stiffness of the voltage in the car could be causing an over voltage due to a ripple though we have no evidence.
The following image from an oscilloscope when the system was running on the simulator shows the possible ripple that occurs on the power supply sometimes. The trigger is a 8ns pulse going below 10V when running on 12.5V fully charged automotive battery. This did NOT cause the reset, but it shows what happens momentarily.
The blue like shows the PWM pulse and the yellow line shows the input from the battery going to Vsup. We can see that when the MOSFET shut, it causes a ripple in the input which is really short, about 10ns peek to peek.
Can anyone indicate if such a tiny ripple has the potential to reset the MCU? Is this kind of a ripple acceptable or this this an anomaly, even though it is detected only sometimes.
Note that we DO have a filter circuit on each BLDC channel.
NOTE that even though the input shows the ripple, the 5V supply from the BCTLC is relatively less but similar time period as it follows the input. This can be seen below
Since we are not using BST and CP, for us the VSUP and HD are directly connected like this.
And on VSUP we have multiple capacitors (not RC filter) and TVS arranged like this
Hi Manish,
Do you read the CPMURFLG register to identify the source of the reset?
The LVR monitors VDDF, VDD and VDDX.
Only the VDDX LVR assert level is specified:
Does the VDDX drop to ~3V?
Can you share the schematic?
If you don't want to share it here, please create a ticket,
Thanks,
BR, Daniel
Hi @manishsangram,
The reset signal is asserted as soon as the voltage reaches the assert level within the range below, and stays asserted as long as the voltage is below the deassert level. Not sure if the LVR circuit can filter such transient events. But there is some hysteresis which ensures that the signal is asserted until the deasert level is reached.
The VDDF, and VDD low-voltage reset levels are not specified, but voltage drop there also causes LVR.
Maybe the root cause is EMC.
Do you have filters at HD and VBS?
Best regards,
Daniel
Hello @danielmartynek ,
We are not using charge pump, so there is no filter for CP either.
We do have the VBS RC filter but please note this in the context of the image shared by you, in our circuit R6 and C8 are supposed to be the RC filter.
So unlike your diagram, your Rhs and Rflt are combined in our case into R6. Does this have any impact on the RC performance? We kind of removed Rhs because it was same as Rflt.
Also from your diagram Cg, we don't have it.
Hi @manishsangram,
I'm sorry for the delay, the community was down for a few days.
1. Rhs and Rflt can be combined this way.
2. But regardless of the charge pump, the HD pin should be protected.
Regards,
Daniel
