Code:
void Config_CRG(void){ WORD counter = 0x0FFF; /* RTIE=0 0 0 LOCKIE=0 0 0 SCMIE=1 0 */ CRGINT = 0x02; /* See above for selection */ /* Don't care as RTI not enalbed. */ RTICTL = 0x00; /* WCOP=0 RSBCK=1 WRTMASK=1 0 0 CR2=1 CR1=0 CR0=0 */ COPCTL = 0x64; /* See above for selection COP times out in 2^20 clocks*/ POSTDIV = 0x00; /* => fPLL = fVCO */ SYNR_VCOFRQ = 0x01; /* 48MHz < fVCO<= 80MHz 01 */ REFDV_REFFRQ = 0x03; /* fREF >12MHz */ /** * fVCO = 2 × fOSC x (SYNDIV + 1) / (REFDIV + 1) * * * fVCO x ( REFDIV + 1 ) * SYNDIV = ----------------------- - 1 * 2 × fOSC * * Let fOSC = 12MHz, fVCO = 48Mhz & REFDIV = 0x11 * Then, SYNDIV = 0x23 */ SYNR_SYNDIV = 0x23; REFDV_REFDIV = 0x11; /* Wait for the PLL to Lock */#define SIMULATOR__#ifdef SIMULATOR__ while (counter--) #else while ( ! CRGFLG_LOCK ) /* This will not happen with out hardware */#endif /* SIMULATOR */ { PetWatchDogCOP(); } /* CME=1 PLLON=1 FM1=0 FM0=1 FSTWKP=0 PRE=0 PCE=0 SCME=1 */ PLLCTL = 0xD1; /* See above for selection */ /* PLLSEL=1 PSTP=1 XCLKS=x 0 PLLWAI=0 0 RTIWAI=0 COPWAI=1 */ CLKSEL = 0xC1; /* See above for selection */}I am trying this out on the
Full Chip Simulation.
*No hardware*- Planned Crystal: 12HMz
- PLL Freq = VCO Freq (as POSTDIV = 0)
- Desired PLL Freq : 48MHz => Desired BUS Freq = 24MHz
Problem: After the execution of the above code, the desired BUS freq jumps to 96MHz and after a few milliseconds of execution, gets an "Illegal_BP" reset. Can you please throw some light on where I may be going wrong?
Thanks, Ravi Shankar Kashi
Message Edited by Ravi Kashi on 2008-11-11 05:55 AM
I had manually forced the Fosc in True-Time Simulator to 48MHz. As soon as I changed that back to 12MHz, everything worked as expected.
