MC9S12XEP100 + external 512KiB RAM = BDM problems!

[Rhapsody]

Dear All,

I have some problems in interfacing an external 512KiB RAM to an MC9S12XEP100.

The very first BDM programming attempt (first power on) of the device went quite well, but instead of stopping to a breakpoint when the firmware download to the microprocessor has finished, the HiWAVE programmer said me that the firmware was ALREADY RUNNING, and I could stop it, neither reset it.. No BDM command seemed to be accepted by the processor.

Anyway, when power cycled the device, the firmware was running (I have some LEDs that told me that).

Then, I tried to reprogramm the device, but this time, it has not been possible. At each command the BDM tried to send, the microprocessor reset (I saw that using again the LEDs, since when a pin is in HiZ, one of those LED is on).

I've already designed boards with the MC9S12X but the very new thing ni this, was the RAM. Thus, I tried to disable it pulling down the MODA pin, and everything was OK!

Now I'm able to programm and reprogram the processor as many times as I want, to put breakpoint, and so on, with the BDM..

If I return to the previous configuration, with MODA pulled up, nothing works, as described above.

Now, the system configuration I'm using is the following:

MODA: pulled up, 5V

MODB: pulled down

MODC: pulled up, 5V

For selecting the normal expanded mode.

The RAM is connected as the following:

RAM_ADDR0 => S12X_ADDR1

...

RAM_ADDR17 => S12X_ADDR18

RAM_UB => S12X_ADDR0_UDS

RAM_OE => S12X_RE

RAM_LB => S12X_LDS

RAM_WE => S12X_WE

RAM_CS => S12X_CS2

RAM_DATA0 => S12X_DATA0

...

RAM_DATA15 => S12X_DATA15

And the memory configuration:

// ENABLING CS2
MMCCTL0_CS2E0 = 0;
MMCCTL0_CS2E1 = 1;

MMCCTL1_ROMON = 1;
MMCCTL1_ROMHM = 0;
MMCCTL1_RAMHM = 0;

EBICTL0_HDBE = 1;
EBICTL0_ASIZ = 0x12;  // just using 18 lines of the address bus, even if the others are left unconnected.

With the MMCCTL1 written once at the very beginning.

My target is to have a 512KiB using the CS2. Where am I wrong?

Thanks in advance,

Ale

[Rhapsody]

In addition, I've tried to load the firmware with external bus disabled (and that's OK), the pulling up the MODA to enable external bus, and then reattaching the BDM to the device.

This way, when I try to halt the processor I get:

STOPPING

HALTED

RUNNING

The processor seems to stop and then reutnr into the RUNNING status.

Instead, when I try to reset and halt the processor, I only obtain a reset and I'm not able to stop it from executing the firmware out of the flash (the place where it is supposed to be).

Actually, I left ROMCTL unconnected.

Maybe this could be the mistake? Should I have pulled it up?

[kef]

S12(X) BDM debuggers are using Special Single Chip mode by default. Mode is convenient for debugging, because it allows debugging from the fisrt CPU instruction, because in Special Single Chip mode MCU is halted immediately after reset. Debuugers assume that MODA=MODB=0 by default. Then to enter Special Single Chip mode debugger puls BKGD(MODC) low and pulses /RESET pin low. So when you set up MODA and MODC for Normal Expanded mode and connect debugger and hit reset, you enter Emulation Sigle Chip mode!

If you configure MODA and MODB for Expanded mode, you should tell debugger that target runs when you connect (hotplug mode). In this case debugger will not reset with MODC pulled low. But on chip flash programming won't be easy in this case, because in Normal modes you can't reset flash protection.

Unless you want MCU to boot from offchip ROM, you may use default Normal Single Chip mode and switch to Normal Expanded soon after reset. This would ease debugging and flash programming via BDM.