MC9S12 PFLASH problem

[赵子成]

Hi Everyone,

Now when I do the updated firmware function in MC9S12 CPU I encountered a problem.

I receive the firmware data from CAN port and write the data to P-FLASH.

When writing to the address of 0x7F7FE6, first I write:

65 6D FF FF FF FF FF FF

Then write the same address:

FF FF FF FF FF FF 66 49

And I read back the data from 0x7F7FE6, I found the data read back are not equal to the data I write to it before.

I read back the data:

65 6D FF FF FF FF 66 4D

It should be 65 6D FF FF FF FF 66 49

Can anyone give me some suggest? Thank you.

[赵子成]

Hi All.

The address I write is 0x7F7FE0, not 0x7F7FE6.

[dianabatrlova]

Hi,

I do not know which exact MCU do you use, but a Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or phrase is not allowed.

I hope it helps you.

Best regards,

Diana

[赵子成]

Hi Diana,

I used MC9S12XEP100.

I don't programe the same word.

First I program 65 6D in the first 2 bytes.(Others are 0xFF)

Second I program 66 49 in the last 2 bytes.(Others are 0xFF)

I don't know what is error.

The true is that if I program others contend to the same address, like:

If I write to 0x7F7FE0 with 65 B5 FF FF FF FF FF FF

then write:FF FF FF FF FF FF 66 91

the read back result is :

65 B5 FF FF FF FF 66 91

The result is OK. I don't know why.

[kef2]

Hi,

You  should mention exact S12 derivative. There are a lot of differences among S12C / S12P / etc.

If your derivative has ECC equipped flash, then what you observe is expected. Whole flash phrase has to programmed at once. Flash phrase ECC bits are programmed along with phrase data. You can't update ECC properly without erase step.

Edward

[赵子成]

Hi Edward,

I used MC9S12XEP100.

The true is that if I write to 0x7F7FE0 with 65 6D FF FF FF FF FF FF

then write:FF FF FF FF FF FF 66 49

the read back result is :

65 6D FF FF FF FF 66 4D

If I write to 0x7F7FE0 with 65 B5 FF FF FF FF FF FF

then write:FF FF FF FF FF FF 66 91

the read back result is :

65 B5 FF FF FF FF 66 91

The result is OK. I don't know why.

[RadekS]

Hi,

Let me explain:

The P-Flash at S12XE is written by phrases.

Phrase—An aligned group of four 16-bit words within the P-Flash memory. Each phrase includes eight ECC bits for single bit fault correction and double bit fault detection within the phrase.

So, if you write a phrase once, the ECC checksum for aligned 64bit is stored together with your data. When you write the same phrase again without sector (1024 bytes) erase, new ECC checksum is calculated and it rewrite already written value (only log1->log0 is possible during flash write). So, the ECC checksum is now damaged and you will probably able to detect single or double bit checksum error during the P-Flash read.

In your first case, the P-Flash detected single bit ECC checksum error and automatically repair the bit error (add one log1 at a most probable place). Therefore, you read different value than you write.

In your second case, the P-Flash didn’t detect ECC checksum or rather detected double bit ECC checksum error. Such an error cannot be fixed automatically. Therefore, you read data what you wrote into P-Flash.

You may check detected errors by DFDIF and SFDIF flags in FERSTAT register.

The cumulative write within a phrase is not allowed.

I hope it helps you

Have a great day,
Radek

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[赵子成]

Hi Radek,

In my second case. Is the data written to the P-Flash 65 B5 FF FF FF FF 66 91?

I am worry about I want to write 65 B5 FF FF FF FF 66 91 and read back is also 65 B5 FF FF FF FF 66 91, But infact this is not the true. Just because the P-Flash didn't detect.

[RadekS]

Hi,

If you write 0x 65 B5 FF FF FF FF 66 91, you will read 0x 65 B5 FF FF FF FF 66 91. That isn’t the problem.

You just simply cannot write it in two steps as you described above. Otherwise, you will damage ECC memory protection checksum and the result of ECC error detection will be hardly predicted (no error/single bit error/double bit error).

This phrase must be written by a single Flash command.

In your first case, you wrote 0x 65 6D FF FF FF FF 66 49 in two steps.

Since the ECC checksum is damaged and the flash reading mechanism detected the single bit ECC error, you simply read 0x 65 6D FF FF FF FF 66 4D instead of 65 6D FF FF FF FF 66 49 what is really written in Flash.

The ECC mechanism is able to fix only single bit errors and to detect double (=two or more) bit errors.

I hope it helps you

Have a great day,
Radek

[赵子成]

Hi Radek,

What I want to know is:

I write 65 B5 FF FF FF FF FF FF then write FF FF FF FF FF FF 66 91 on the same address.

And read back is 65 B5 FF FF FF FF 66 91.

Can I say the data is safe?

Or the data saved in P-Flash is right?

[RadekS]

Hi,

No, you cannot say that the data is safe.

It is forbidden to program the same phrase more than once without erasing.

It is not healthy for Flash and you may potentially read incorrect data (as you already detected).

Only allowed way how to modify data inside the same phase is reading the whole sector, modify data in RAM, erase Flash sector, and write back the whole sector.

If you need often change a small amount of data, you should choose EEPROM (emulated EEPROM at S12XE) as storage instead of P-Flash module.

I hope it helps you

Have a great day,
Radek