List based ADC architecture

[basilmathew]

Can somebody help me to know about the List based ADC architecture in a simple way ? or some link ?

unsigned int ADC_read(unsigned int channel)

{

 adc0_cmdlist[0][1] = 0xC0|channel;                    What does this line of code means ???

 ADC0FLWCTL_RSTA = 1; // Restart Event
 while(0x00 == ADC0CONIF){} //wait until conversion is complete
 ADC0CONIF = ADC0CONIF;//clear flag
 return adc0_results[0];
}

[danielmartynek]

Hi,
Please refer to ADC Command Registers description (ADCCMD_n) in the reference manual of the MCU.
The cmdlist array contains a list of commands.
You may also take a look at: Example S12ZVL ADC0 triggered by TIM0 OC updates PWM duty cycle 

In your code, cmdlist is an array of chars, whereas in the example above, it is an array of long ints.

Regards,
Daniel

[basilmathew]

Hi ,

Thank you for the reply .

Could you tel me , then why we are not loading the command settings directly in to the  ADCCMD_n  register  in the following code .

In the following sample code , i couldn't see any declaration using ADCCMD register but array data is moved in to the ADC0CBP_0 , ADC0CBP_1 ,  ADC0CBP_2 registers respectively . Why ?

volatile unsigned char adc0_cmdlist[1][4] = {0xC0,0xD0,0xA0,0x00};
....................................

void ADC_init(void)

{
ADC0CBP_0 = (unsigned char)(((long)adc0_cmdlist) >> 16);
ADC0CBP_1 = (unsigned char)(((long)adc0_cmdlist) >> 8);
ADC0CBP_2 = (unsigned char)((long)adc0_cmdlist);

.....................................

} 

[danielmartynek]

Hi,

The ADCCMD_n registers are writable only if ADCCTL_1[SMOD_ACC] is set.

And SMOD_ACC bit is writable only in the Special mode of the MCU for debugging purposes. 

Please take a look at the description of the SMOD_ACC bit in the RM.

Regards,

Daniel