Hi,
You can enable the COP by HW and COP is enabled immediately after reset. It is done by writing bit NV[2..0] in the FOPT storage place in the flash memory at address 0xFF_FE0E. This value is then copied into the CPMUCOP register during reset sequence so COP is enabled automatically and immediately. Of course, in this case, writing CPMUCOP in the SW has no meaning because the CPMUCOP is write once only in the normal mode. The data sheet states:
Write:
- RSBCK: Anytime in Special Mode; write to “1” but not to “0” in Normal Mode
- WCOP, CR2, CR1, CR0:
— Anytime in Special Mode, when WRTMASK is 0, otherwise it has no effect
— Write once in Normal Mode, when WRTMASK is 0, otherwise it has no effect.
– Writing CR[2:0] to “000” has no effect, but counts for the “write once” condition.
– Writing WCOP to “0” has no effect, but counts for the “write once” condition.
This can be done by means of following code in the main.c file
// set COP second largest period NV[2..0] = 0001 => COPCTL_CR[2..0] will be 111 after reset
// set no COP window WCOP = 0 => NV3 must be NV3 = 1
// Chapter 1.13.2 COP Configuration
const unsigned char COP_HW_START @ 0xFFFE0E= 0B00001000;
void main(void) {
…
…
Then in the S record you can find line:
S205FFFE0E08E7
The CodeWarrior uses macro __RESET_WATCHDOG(); /* feeds the dog */
Which is defined as
#define __RESET_WATCHDOG() (CPMUARMCOP = 0x55U, CPMUARMCOP = 0xAAU)
However, it can happen you want or must refresh the watchdog somewhere else where MCU’s registers are not included. In this case you have to either include registers header file or insert the code in the assembler form at appropriate place to ensure the COP does not overflow.
asm { MOV.B #0x55,0x06CF;
MOV.B #0xAA,0x06CF;
}
Finally, if I use this approach (immediate COP enable) I would use it in a final step of design to avoid problems during debugging.
Best regards,
Ladislav
