DSCs and programmable delay block...

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DSCs and programmable delay block...

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TurboMan
Contributor IV

Having problems and looking for suggestions for the PDB.

 

I have a stand alone project, where I can enable / disable the PDB after software delays, but I can't replicate this functionality in production code. I'm using the following:

 

[Code]

//Set PDB producing pulses here...
GPIOC_PER |= 0x4000;//Set GPIOC14 as peripheral for PDB.
PDB1_MCTRL &= ~PDB1_MCTRL_PDBEN_MASK;//Disable module
PDB1_CTRLA &= ~(PDB1_CTRLA_DAF_MASK | PDB1_CTRLA_DBF_MASK);//Clear A and B delay flags
asm(nop);
asm(nop);
PDB1_MCTRL |= PDB1_MCTRL_PDBEN_MASK;//Enable module
PDB1_MCTRL |= PDB1_MCTRL_SWTRIG_MASK;//Software trigger.
asm(nop);
asm(nop);//Spacing nops?

[/Code]

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TurboMan
Contributor IV

Hello Xiangjun,

  my apologies for not flagging this as answered! It's sorted now. (DSC56F84789)

I wanted to generate a fixed pulse length, periodically, by trigger. this worked in a test project but not production code.

The answer was to use the "#pragma interrupt" declaration in the interrupt code. In the test project it didn't matter, but production code obviously had more going on in the way of interrupts, which was why the core registers were probably getting corrupted without the pragma.

Thanks for your help though :smileyhappy:

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TurboMan
Contributor IV

The working code is here:

[Code]

//Delay, pbd on, delay, pdb off
delayLoop(20000000);//iterations / instr cycles to delay
GPIOF_DR |= 0x40;//Toggle bit 6
GPIOD_PER |= 0x80;//PDB peripheral enabled.
//PDB1_MOD = 50000;//Modulus
//PDB1_DELAYA = 1;//500us
//PDB1_DELAYB = 45000;//45us
//delayLoop(10000);//~100ns per iteration: 10k = 1ms
PDB1_MCTRL |= PDB1_MCTRL_PDBEN_MASK;//Switch on
PDB1_MCTRL |= PDB1_MCTRL_SWTRIG_MASK;//SW trigger
delayLoop(20000000);//iterations / instr cycles to delay
GPIOF_DR &= ~0x40;//Toggle bit 6
GPIOD_PER &= ~0x80;//peripheral disabled.
PDB1_MCTRL &= ~PDB1_MCTRL_PDBEN_MASK;//Switch off

[/Code]

The code in the previous post has extra lines added in to disable the PDB before enabling, and spacing asm NOPs, as the original two lines enabling the module and setting the software trigger just didn't work.

The configuration is set in processor expert, and works for the above config, but not the previous post.

The requirements are that the PDB module remain logic one normally, but generate negative pulses, at approx 98% duty cycle for a period, every so often.

So, I've

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TurboMan
Contributor IV

Don't post with code tags - it stops you posting anything else - in Chrome...

So, I've configured the above code to work in a for() loop, and it does. I toggle an LED for indication, and a second line is switched from GPIO output high, to peripheral output with the PDB generating the pulses. Great. Now I can't do this in production code for some reason.

Is anything else likely to interfere with the PDB? Interrupts? anything to look for in the SIM module? Should I just reset the PDB and put in the values from fresh before using? Running out of ideas here.

(posted above again due to website error)

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xiangjun_rong
NXP TechSupport
NXP TechSupport

could you tell me the DSC part number you are using? From the code, I do not know what you want to do, do you want to generate an interrupt at a fixed cycle time?

Pls give me detailed information, I will test it on my evaluation board.

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TurboMan
Contributor IV

Hello Xiangjun,

  my apologies for not flagging this as answered! It's sorted now. (DSC56F84789)

I wanted to generate a fixed pulse length, periodically, by trigger. this worked in a test project but not production code.

The answer was to use the "#pragma interrupt" declaration in the interrupt code. In the test project it didn't matter, but production code obviously had more going on in the way of interrupts, which was why the core registers were probably getting corrupted without the pragma.

Thanks for your help though :smileyhappy:

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