Current Sense Amplifier settling time tcslsst on S12ZVM

[ikkishingu]

Hello,

I would like to clarify the definition of Current Sense Amplifier large signal settling time(tcslsst) on S12ZVM.

There is a spec as simulation data in S12ZVM RM rev1.5 Appendix E #41 as below,

   Current Sense Amplifier large signal settling time (tcslsst) : typ 2.9us

I cannot find the condition infomation of this simulation in RM.

On the other hand, there is the description in section1.13.3.2, as below

"The current sense amplifier delay is highly dependent on external components."

So, I cannot understand how tcslsst is specified and how we can treat a tcslsst spec.

Then could you tell me the condition(external circuit)  when tcslsst is specified?

The purpose of this quistion is to decide the ADC timing of feedback current sensing.

Best Regards,

Ikki

[iggi]

Maybe the following appnote will give you better understanding of term 'Settling Time':

http://www.analog.com/static/imported-files/application_notes/466359863287538299597392756AN359.pdf

On page 13-99, you can find suggestions for circiut design.

Regards,

iggi

[ikkishingu]

Dear iggi

Hello,

Thank you for your information.

I can understand the definition of settling time. It is the same as I expected.

About the circuit design you indicated , is it the same as the circuit Freescale prepared for specifying settling time(tcslsst) on S12ZVM?

Or it is OK if you can say that tcslsst does not include the effect of the external circuit(capacitance factor, etc..), only the origin from amplifier.

Best Regards,

Ikki