RDDRONE-BMS772

[iaingalloway]

Please ask questions about the RDDRONE-BMS772 board and software here

[lmiles-sosub]

After this voltage drop of the charger, will the charger stay off?

No at this point the charger will stay on. So it would restart the charge process if the current draw stopped. In the future we will implement a controllable charger to disable upon full charge.

Or will it have a lower voltage than your battery and the charger is protected against sinking the current?

No the charger is slightly higher in voltage to achieve full charge but it is also protected against reverse current.

Would it be feasible to increase the voltage level in which the BMS determines the charger has been disconnected? This way it may prevent the brown out of the computer. Then it would go back into charge state and protect itself from overcharging.

I will also intergrade a UPS as an alternative solution to the problem.

Thanks for your help  

[lmiles-sosub]

Hi All,

We are testing the use of the BMS in an ROV system with a charger that constantly supplies power to the ROV and the battery will provide power for peak loads above the chargers power capacity. 

We are having some issues when the battery reaches its under voltage protection (enters fault mode) and are trying to recover the BMS from fault state to be able to charge the battery. 

Ideally the BMS would shut off output but would still allow a charge current to enter the battery, without needing to be reset. Currently we are resetting the BMS remotely through the CLI to remove the fault however to power the system we must have the charger on, which then results in the self test failing and suggesting to remove the charger.

My question is around the functionality of the charger having to be disconnected for the gate self test. What is the purpose of it and would there be a critical issue if I were to disable it in the firmware?

Thanks for your help.

Lewis

[cisvmierlo]

Hi @lmiles-sosub,

The purpose of the gate check is to make sure the gate driver is able to turn off the power. It there would be something wrong with this or other components and it is not able to turn off the power, this could result in a safety issue, hence the self-test. 

I get that for your purpose, this is not ideal. Feel free to disable this check in your software for your purpose if you think this is safe.

Keep in mind that it will not check if the power can be switched off.

Plus I would advise you to still turn off the power in that part of the code, you could either replace the part with the below piece of code or add compile switches (#ifdef #else #endif) so you could easily go back to the original state.

This part needs to be replaced or put in an compile switch: https://github.com/NXPHoverGames/RDDRONE-BMS772/blob/main/src/batManagement.c#L608-L672 

This is the piece of code I would advice you to still add:

// still turn off the gate
batManagement_setGatePower(GATE_OPEN);

cli_printfWarning("SELF-TEST GATE: TURNED OFF!\n");

I hope this answers your question, kind regards,

Cis van Mierlo

[lmiles-sosub]

Thank you that solution worked well for us.

[Prince1]

Hi,

Tera term is throwing few errors when connected with BMS as shown in images attached herewith.

"Couldn't do measurements and also Failed to update measurements"

Please help in resolving them?

Thanks,

Prince

[cisvmierlo]

Hi @Prince1,

Have you tried rebooting the MCU with the "reboot" command?

Another thing you could try to reset the communication errors (as they are remembered) go to DEEP_SLEEP and back to NORMAL state?

Otherwise you could try to re-power the BMS power to solve the problem.

Kind regards,

Cis van Mierlo

[Prince1]

Hi @cisvmierlo,

I tried rebooting and re powering the BMS it didn't help. I will try going into DEEP_SLEEP.

Thanks for your help.

Regards,

Prince

[suvasis]

hi,

I am trying to redesign the PCB to a smaller form factor for my drone. The following document

https://www.nxp.com/design/designs/smart-battery-management-for-mobile-robotics:RDDRONE-BMS772

generally provides schematic and fabrication files but those link does not contain the source file of the PCB. can anyone include the source file for the PCB?

Can anyone help me?

thanks.

suvasis

[cisvmierlo]

Hi @suvasis ,

The .brd layout file of the RDDRONE-BMS772 has been added to the design files and could be downloaded.

Please see https://www.nxp.com/design/designs/smart-battery-management-for-mobile-robotics:RDDRONE-BMS772

Kind regards,

Cis van Mierlo

[cisvmierlo]

Hi @suvasis, 

I've asked the team if they could upload the board file (.brd) as well to nxp.com.
Be aware that this could take a couple days.

The schematic file (.DSN) is already included.

Kind regards,

Cis van Mierlo

[DaveNXP]

Hello,

The PSMNR70-30YLH MOSFETS that are recommended by NXP documentation unfortunately are not available to buy in the sites I tried. This is an issue because I can not test with safety the board.  I read in this community I can find it in Nexperia but the minimun quantity to order is 1500. I tried to look for another equivalent one but I cannot find it with the same characteristics. I don't know the tolerance or how much the MOSFET can differ.

The MOSFET characteristics recommended by NXP are below. What other characteristics are tolerated or what other suitable characteristics can you recommend, please? 

N-channel 30 V

0.82 mΩ,

300 A logic level

MOSFET in LFPAK56 using NextPowerS3 technology

Thank you very much

[DaveNXP]

Does anybody know how to factory reset the RDDRONE BMS board(or awaken it)?

The board may be in deep sleep or in a state I cannot get it out.

At first I could connect to the core (Cortex-M4 identified) but after this, when I tried to flash the firmware, I cannot connect to the target anymore(log copied in previous post). So I cannot send any command with J-Link Commander. The voltage of the J-Link debugger is 3.3V. I pressed the physical button while board powered but nothing changed and it does not wake up.

This happened to the two RDDRONE boards I bought.

Please, any help would be really appreciated.

Thank you! @cisvmierlo @iaingalloway 

[cisvmierlo]

Hi @DaveNXP ,

Could you check de reset line of the debugger? If it is correctly connected to the MCU?

Or if J2 is placed, maybe use this 2x5 connector to program the board via that programming header?
If J2 is not placed, maybe you could solder a 2x5 pin header in to program the board via that route.

Kind regards,

Cis van Mierlo

[DaveNXP]

Thank you for your answer,

I already tried with the J2 connector(it is placed) thought JTAG lines, with the reset jumper and without it. And I still cannot connect to the target.

What could I do? How could I check the Reset line is properly connected and the signal is ok.

Thank you very much @cisvmierlo 

[cisvmierlo]

Hi @DaveNXP ,

Do you have access to an oscilloscope? And could you measure the if there are pulses on the MCU reset line?

Kind regards,

Cis van Mierlo

[DaveNXP]

Thank you so much @cisvmierlo . I think there was an issue with the reset signal. Now it's working, so thank you!

[DaveNXP]

Hi,

I have a problem with the RDDRONE-BMS772 board.

I soldered the hardware "configuration pads" as recommended in the RDDRONE-BMS772 manual for a 6s battery.

https://nxp.gitbook.io/rddrone-bms772/user-guide/getting-started-with-the-rddrone-bms772/configuring...

Then, I connected the RDDRONE-BMS772 board to a 22.2V power supply for the first time, the onboard LED turned on.

I followed the steps in this guide from the "NXP Gitbook":

https://nxp.gitbook.io/nxpmobilerobotics/flashing-guide/flashing-hovergames-boards/windows

but after trying to flash the firmware bin file downloaded from the official github:

https://github.com/NXPHoverGames/RDDRONE-BMS772

with the recommended J-LINK  debugger and I connected the cables as seen here:

https://nxp.gitbook.io/hovergames/rddrone-fmuk66/connectors/debug-interface-dcd-lz/dcd-lz-breakout-b...

The flash failed (log below), and I cannot connect to the RDDRONE-BMS772 board anymore. Furthermore, the LED does not turn on either. I am trying to re-flash it, but I cannot get J-Link commander to connect to the RDDRONE-BMS772 anymore.

If I try to access the board using an FTDI cable, I do not get any serial connection using Putty either.

I am a bit confused as I do not understand if the problem is that the CPU is halted, or the CPU is in a RESET loop, the CPU waiting for a RESET signal, the CPU is "locked" and I have to unlock it, or if it is something else.

Any help would be highly appreciated.

This is the log I got from the J-Link Commander console, in case it is helpful:

Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: S32K144
Type '?' for selection dialog
Device>
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>s
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>1000
Device "S32K144" selected.

Connecting to target via SWD
InitTarget() start
SWD selected. Executing JTAG -> SWD switching sequence.
InitTarget() end - Took 55ms
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[2]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
AP[1]: JTAG-AP (IDR: 0x001C0000)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[0][1]: E0001000 CID B105E00D PID 003BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 003BB001 ITM
[0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
Initializing 61440 bytes work RAM @ 0x1FFF8000
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Memory zones:
Zone: "Default" Description: Default access mode
Cortex-M4 identified.
J-Link>erase
No address range specified, 'Erase Chip' will be executed
'erase': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Erasing device...

****** Error: Failed to erase sectors.

J-Link: Flash download: Total time needed: 1.490s (Prepare: 0.603s, Compare: 0.000s, Erase: 0.885s, Program: 0.000s, Verify: 0.000s, Restore: 0.002s)

****** Error: Failed to restore target. RAMCode never stops
ERROR: Erase returned with error code -5.
J-Link>loadbin "C:\Documents\RDDRONE-BMS772-main\Binary\nuttx.bin" 0x0
'loadbin': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: SYSRESETREQ has confused core.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
Reset: Using fallback: VECTRESET.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Reset: VECTRESET has confused core.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
CPU could not be halted
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
CPU could not be halted
Reset: Failed. Toggling reset pin and trying reset strategy again.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: SYSRESETREQ has confused core.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
Reset: Using fallback: VECTRESET.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Reset: VECTRESET has confused core.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
CPU could not be halted
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
Found SW-DP with ID 0x2BA01477
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x2BA01477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
CPU could not be halted
CPU could not be halted

****** Error: Failed to halt CPU.
CPU could not be halted
Downloading file [C:\Documents\RDDRONE-BMS772-main\Binary\nuttx.bin]...
CPU could not be halted

****** Error: Failed to restore target. RAMCode never stops
Failed to erase sectors.

Unspecified error -1
J-Link>

[cisvmierlo]

Hi @DaveNXP ,

It seems that you can connect to the core, but not erase nor flash it.

Could you try to restart the J-Link commander and halt the core with the 'h' command?

Kind regards,

Cis van Mierlo

[DaveNXP]

Thanks for the answer cisvmierlo,

The thing is that at first I could correctly connect to the the core on the RDDRONE-BMS772 board, but after this first flash I cannot connect to core on the board anymore. So, I cannot send this 'h' command you recommend.

Do you have any other ideas?

[cisvmierlo]

Hi @DaveNXP,

Could you check if the voltage is OK according to the debugger?
Maybe the SW put the system in deep sleep and a button press is needed to start it up again.

Kind regards,

Cis van Mierlo

[DaveNXP]

Hi Cis van Mierlo

The debugger provides 3,3V. And the output of the power supply connected to the RDDRONE board input is 22,2V. I do not understand very well what the problem may be and what changes and tests I should do.

I don't know any button to press or way to start it up again. I would really appreciate any help for this.

Thank you. Kind regards.