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poreset

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christiandsouza
Contributor I

T2080 just wont come out of reset..

PORESET_N is negated by fpga

SYSCLK is stable around 50msecs before the negation of PORESET_N

However the T2080 asserted HRESET_N around 500msec earlier when all the T2080 power rails are valid..

So generally

PORESET_N low

Power rails ramp

After ramp HRESET_N driven low

CLKSYNTH_RST negated 450ms later

CLKs stable 1.5ms later

PORESET_N negated 50ms after CLKSYNTH_RSTn negated.

I see no access on I2C0.. with PORcfg resistors setup for I2C RCS access.

Additional data on images attached

Note that the name format is method_ch1_ch2_Ch3_Ch3_Num.jpg

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Pavel
NXP TechSupport
NXP TechSupport

First of all check your board using the T2080 Design CheckList - AN4804:

http://cache.nxp.com/files/32bit/doc/app_note/AN4804.pdf?fpsp=1&WT_TYPE=Application%20Notes&WT_VENDO...

Draw attention on the Chapter 5.

It looks like that PORESET setting on your board is too short. See the powerON_t280poresetn_t2080hresetn_t2080sysclk_t2080asleep_1.jpg file.


Have a great day,
Pavel

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