pcie loopback

cancel
Showing results for 
Search instead for 
Did you mean: 

pcie loopback

744 Views
Contributor II

Is there anyway to configure a QorIQ processor such as the T2081 to do loop back of the TX signals onto the RX signals? I have an FPGA on one endpoint that can run PCIe tests but only if the other end is looping back the signals. On the FPGA it is called serial loopback mode, anything similar on the CPU side? 

Thanks,

Vinny

Labels (1)
1 Reply

146 Views
NXP TechSupport
NXP TechSupport

Hello viniamin tokarchuk,

To test/Validate PCIe Lanes, you could use a loopback device to connect PCIe Tx port to its Rx port.

Please read LTSSM state status register (PEX_CSR0) to check the status of link training, in case of successful PCI Express link training the register value will be 010001b - L0 state.

For details, please refer to CSR0[LTSSM_SC] in T2080 Reference Manual.


Have a great day,
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------