TLB and MMu

[monalihaware]

In the init files of qor iq(t series), tlbs are progrmed.

1.  What Are the CAM registers and where are they located? In t2080, in e6500 manual  I am not abke to find them.

2. Is it necessary to program tlbs in the bare board while bribginb it up? Without the tlbs , cant I access and write directly into LAWs and IFC, DDR registers and access flash and DDr memories??

3.are the addresses which we program in the init files the effective addresses or physical addresses of peripherals like e8000000 for flash etc.

[ufedor]

1) The CAM registers are described in the CodeWarrior Development Studio for Power Architecture Processors Targeting Manual, 5.10.5.4.5 e6500 Registers.

2) It is required to initialize TLBs for accessing CCSR, IFC banks and DDR SDRAM area.

3) Physical.