T1024RDB

[ramchandra]

Hi,

  I am using the T1024RDB freescale development board for my application, I am new to this demo board, How can i understand the memory architecture of this board. How to configure the MMU and LAW for each memory identification, How can i see which memory i s which size. 

Regards,

Swathi

[Pavel]

Look at attached files. These files are CodeWarrior initialization files for the T1024RDB board.

Have a great day,
Pavel Chubakov

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[ramchandra]

Hi Pavel,

  Thanks for providing such a useful information. Currently i am using lauterbach emulator with Trace32 s/w. but in converted all the code warrior setting into Trace32 script and it is working fine. the board is up and running. But i have below doubts.

1. In LAW configuration the DDR memory was configure as 2GB in the single shot, but when we look into MMU it is done is 2 steps 1 gb each, is there any specific reason, or it is the processor configuration limits it to 1GB max.

2. After configuring the NOR flash address 0xE8000000  0xEFFFFFFF, when i look into the memory mapping in trace32 it shows the memory is taken from 0xE0000000  0xEFFFFFFF(256MB) instead of 0xE8000000  0xEFFFFFFF. But the memory 0xE0000000 to 0xE8000000 is filled with 0x00 and we cannot write anything in that.

3. What is the use of configuring the MMU for Boot page 0xFFFFF000  0xFFFFFFFF 

4. When the nand flash is configured as only 64KB, in board it is of 1GB

5. When we configure the MMU for  CPLD from address  0xFFDF0000  0xFFE0FFFF, in Trace32 it is showing as 0xFFDC0000  0xFFDFFFFF -- 256 KB

Below is the screenshot of my mapping

Please provide your thoughts on this

[tapyang]

I have  the same questions!Have you explain it?