SRIO interface p2020 u-boot. Cannot read IO memory

[andreipetrukhin]

Hello

I try running a srio interface on my p2020 custom board. I plug a FPGA board with srio firmware to SRIO1 and configure SRIO as a host.

In uboot_config

configs/p1_p2_rdb_pc.h

#define CONFIG_SRIO1 /* SRIO port 1 */°
#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */

tlb.c
SET_TLB_ENTRY(1, CONFIG_SYS_SRIO1_MEM_VIRT, CONFIG_SYS_SRIO1_MEM_PHYS,
          MAS3_SX | MAS3_SW | MAS3_SR,°
          MAS2_I | MAS2_G,
          0, 3, BOOKE_PAGESZ_256M, 1),

Try to read srio memory from u-boot
=> md.l 0xc0000000
c0000000:

p2020 is stucked.

I can watch a read request and read response on FPGA board.

Why I can't read a srio memory?

[yipingwang]

Hello Andrei Petrukhin,

Please define the following in include/configs/p1_p2_rdb_pc.h.

#define CONFIG_SYS_SRIO

You could refer to the configuration for MPC8569MDS.

Have a great day,
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[andreipetrukhin]

Hello, I have #define CONFIG_SYS_SRIO and other setting in the include/configs/p1_p2_rdb_pc.h. Now, I connete two P2020 processor one to another, by SRIO interface, and it's work! The problem was in the FGPA decvice. Thank you for your reply.

[andreipetrukhin]

I set a gpio 'marks' for each Interrupt vector in start.S. When I try to read Srio memory, uboot is stacked. An interrupt doesn't occur. I cannot determine the cause of the error.