Please I need help. I'm not receiving any frames in DQRR after enqueueing a command for QDMA. DQRI interrupt status bit doesn't get set (despite enabling it), and all DQRR entries are zero. This is just the very first run-time access of qbman and qdma after reset and initialization. I'm using LS1088ARDB. We are coding bare-metal firmware but used almost exactly the same qbman, dpaa2-qdma, and other dpio and dpaa2 codes used in Linux.
Management commands are working (despite cache is disabled) in CENA region and RR0/1 returns readable replies.
- So, CENA region also works despite lack of cache.
Recoverable and non-recoverable errors interrupt are all enabled but returns nothing in its status registers
- so, none of these recoverable and non-recoverable errors occurred.
DQRR entries are all zero. DQRR_PI is valued at 0x80 before and after enqueueing
Int status register works, because when I enabled EQDI interrupt as well as set this bit in an enqueued command in EQCR, EQDI status bit in ISR was set. Meaning command is dispatched. DMA also took place.
- But DQRI status bit never get set after command dispatch
FQID 7 - the response FQ I registered to DPIO1 via dpdmai_set_rx_queue, upon reading its FQD via MC command, is at state 0x2 before and after enqueue - meaning tentatively scheduled
- but so do FQID 5 the transmit queue for enqueueing. FQIDs 5 & 7 are in priority vs 6 & 8 (priority).
- FQID 8, which I assume I don't use for receiving, has before and after state of 0x4 - parked.
Confirmed from reading FQD of FQID 7 that the user context I registered in dpdmai_set_rx_queue is correctly recorded.
We are using array mode (EPM=11h) in EQCR as in the LInux code.
DQRR ITR = 0, so even one new dequeue frame must trigger interrupt. But none happened.
Max DQRR = 8 in SWP_CFG is the same as in Linux qbman-portal code
SDQCR in qbman swp descriptor is 0x21bb0001
Confirmed that dpio_open, dpio_reset, dpio_get_attributes, dpio_enable commands were sent before calling qbman_swp_init.
What could be the reason here I'm not receiving any dequeue frames in DQRR? Did i miss anything in turning it on? Does the QMAN sends in a wrong FQ? Where else can I check? I'm running out of checking options here.
You, or one of your colleagues, are already in communication with NXP Technical Support with respect to this issue,
Support Case record #00166115. All available information and suggestions will be provided using that Support Case.