[LS1046A] Inquiries regarding pin termination

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[LS1046A] Inquiries regarding pin termination

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Contributor I

To whom may it concern

 

Hello, I'm HS.

 

I've been working on designing the board referenced LS1046ARDB and FRWYLS1046.

The board does not include CPLD nor MCU, quite similar to FRWY.

 

1. What's the purpose of TA_TMP_DETECT_B, TA_BB_TMP_DETECT_B?

- According to the datasheet, it says "Tamper Detect" but I'm not sure what "Tamper" means in this context. Please provide me with information about these two pins and how to terminate them.

 

2. What's the purpose of TA_BB_VDD, PROG_MTR, PROG_SFP?

- According to LS1046ARDBGSG, Jumpers are populated and users can select these signals either open or closed. The document denoted that TA_BB_VDD is shorted, PROG_MTR and PROG_SFP are open as default value respectively but it doesn't mention when they should be shorted or opened. Please provide me with information about these two pins and how to terminate them.

 

3. EEPROM near LS1046A(I2C) and PHY(AQR107) at LS1046ARDB

- EEPROMs are populated near LS1046A(I2C) and PHY(AQR107) at LS1046ARDB.

What's the purpose of these EEPROMs?

 

4. SPI_PCSx at LS1046A

- What's the purpose of SPI_PCSx and how to use them?

I checked that SPI_PCS0 is connected to SDHC_VS(CPLD) in LS1046ARDB.

My board doesn't have cpld nor mcu and have sdhc and eeprom which will be connected by SPI.

Please inform me of how to connect them without bumps.

 

5. Sensevdd, sensegnd in LS1046A.

- What's the purpose of these two pins?

These two pin are connected to DIFF P/N in DCDC(LTC3866) through SPDT(NX3L4684TK) with pull up/down resistors(100ohm) in LS1046ARDB.

I want remove the switch and connect these two signals from LS1046A to DCDC(LTC3866).

Please let me know the termination and if pull up/down resistors are necessary with respect to CPU_VDD.

 

Thank you!

 

 

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13 Replies

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NXP TechSupport
NXP TechSupport

1) external tamper detection circuitry to the system, (such as an access-panel-open switch, light sensor inside the electronics chassis, or voltage out of range).

2) battery-backed portion is referred to as the Low Power (LP) section, and the TA_BB_VDD pin is the power supply to the LP section.

PROG_MTR - factory test pin (has to be connected as stated in the AN5252)

TA_PROG_SFP - power input for fuse programming

3) What are schematics numbers?

4) SPI_PCSx is a SPI chip-select x

> SPI_PCS0 is connected to SDHC_VS(CPLD) in LS1046ARDB

Secondary function of the signal is SDHC_VS (refer to the AN5252).

5) These are dedicated voltage and ground feedback signals for a power supply.

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Contributor I

Thank you for your reply!

 

1) external tamper detection circuitry to the system, (such as an access-panel-open switch, light sensor inside the electronics chassis, or voltage out of range).

--> I assume "tamper" means kinda attempt to tinker with the board in this case.

So i think we need to apply voltage to these pins if we want he tamper detect.

But do FRWY and LS1046ARDB have sensors as you aforementioned?

How do they detect the tamper?

 

2) battery-backed portion is referred to as the Low Power (LP) section, and the TA_BB_VDD pin is the power supply to the LP section.

--> I'm not quite sure what 'battery' means in this context. 

Do you mean the battery as it is populated in LS1046ARDB which looks like a coin?

 

PROG_MTR - factory test pin (has to be connected as stated in the AN5252)

--> AN5252 denoted that it needs to be pulled down via resistor to ground.

What would be the value of this pull-down resistor?

 

TA_PROG_SFP - power input for fuse programming

--> What would be the difference between secure boot programming(when it is supplied 1.8V) and normal operation(whenit is pulled dwon through a resistor as AN5252 mentioned)

Also, what would be the value of this pull-down resistor?

 

3) What are schematics numbers?

--> I referenced the schematic of LS1046ARDB - SPF-29142_B2 and FRWY_LS1046A_SCH-43607_SPF-43607.

Would you provide me with latest one if they are not the latest one?

 

4) SPI_PCSx is a SPI chip-select x

> SPI_PCS0 is connected to SDHC_VS(CPLD) in LS1046ARDB

Secondary function of the signal is SDHC_VS (refer to the AN5252).

--> I assume SDHC_VS - VS stands for Voltage Select(ion) and is used for providing signals to DCDC when the voltage level of data/clock form SD Card is not sure or can be changed.

The voltage level of sd card in my application is 3.3V and will not be changed.

So i don't think i need SDHC_VS function but primary function of this pin is SPI_PCSx and i'm still not sure about if i need it or not since its feature is not clear.

SPI_SIN,SOUT,CLK pins are connected to EEPROM in my application and this EEPROM is the only one who uses the SPI.

Should i connect it to SPI_PCS0?

How does SPI_PCSx work?

 

 

5) These are dedicated voltage and ground feedback signals for a power supply.

--> Do they need pull up/down resistors?

 

 

I have one more question.

I read the yellow box below but not sure about it.

Do these components need to connect to LS1046A? 

Or can be omitted?

20200916_092951.jpg

 

Thank you!

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NXP TechSupport
NXP TechSupport

1) Refer to the TA_TMP_DETECT_B connection in the evaluation boards.

2) About the battery - yes.

> What would be the value of this pull-down resistor?

Refer to the evaluation boards schematics for both pull-down resistors.

3) What are schematics numbers of the components in question?

4) If you use SPI the signal "SPI_PCS0/GPIO2_00/SDHC_DAT4/SDHC_VS" has to be connected to the chip-select input of the SPI device.

5) If not used could be left unconnected.

In the provided picture - please read text with yellow highlight.

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Contributor I

Thank you for your reply!

 

2) About the battery - yes.

--> The coin battery will not be populated in the board I've been working on.

If there is no battery on board, can we omit pins regarding battery backed ?

 

Also, i assume you forgot one of my questions below.

What would be the difference between secure boot programming(when it is supplied 1.8V) and normal operation(whenit is pulled dwon through a resistor as AN5252 mentioned)

 

3) What are schematics numbers of the components in question?

--> U32 and U15 in LS1046ARDB

 

4) If you use SPI the signal "SPI_PCS0/GPIO2_00/SDHC_DAT4/SDHC_VS" has to be connected to the chip-select input of the SPI device.

--> How does this pin work?

5. I assume connecting two signals - sensevdd, sensegnd from LS1046A to DCDC(LTC3866) would be better than let them being floated. Am i correct?

Let me know the termination and if pull up/down resistors are necessary with respect to CPU_VDD.

 

 

Thank you!

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NXP TechSupport
NXP TechSupport

2) Refer to the AN5252

> What would be the difference between secure boot programming(when it is supplied 1.8V)

> and normal operation (whenit is pulled dwon through a resistor

The only difference is: secure fuses programming is possible only when 1.8V is applied

3) U32 - Half of the device is used as an SPD EEPROM for DDR. The other half is used to store system ID and MAC address.

U15 - firmware for the AQR107

4) QorIQ LS1046A Reference Manual, Figure 32-5. Module transfer timing diagram (CPHA=0, FMSZ=8)

5) You are correct.

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129 Views
Contributor I

To whom may it concern. I posted several questions.

When can i expect to hear from you?

Thank you

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208 Views
Contributor I

Thank you for you reply!

 

2) Refer to the AN5252

> What would be the difference between secure boot programming(when it is supplied 1.8V)

> and normal operation (when it is pulled down through a resistor)

The only difference is: secure fuses programming is possible only when 1.8V is applied

--> I still don't get it. Would you break it down little bit? Like..Why is secure boot programming necessary and the difference between when you use it and you don't?

 

3) U32 - Half of the device is used as an SPD EEPROM for DDR. The other half is used to store system ID and MAC address.

U15 - firmware for the AQR107

--> Would you elaborate what "SPD EEPROM for DDR" is and how it works??

--> You said U15 is used to store firmware for the AQR107. What is this firmware? Does it have something to do with 1588? Does NXP provide this firmware?

 

5) You are correct

--> I couldn't find the information regarding termination of these pins.

Let me know the termination and if pull up/down resistors are necessary with respect to CPU_VDD.

 

I have several more questions.

 

Q1. 5 discrete DDRs are populated in FRWYLS1046A and one of them is for ECC. Am i correct?

What happen if i don't populated 1 DDR for ECC when other nets and components are exactly same?

Would it work without problems?

 

Q2. When it comes to 1588, i assume LS1046A handle the signal and timestamp them. Am i right?

I wonder if AQR107 is also used for time-stamping as to 1588 in LS1046ARDB.

 

Q3. I assume if external clock(125MHz) goes in Pin AC1(TSEC_1588_CLK_IN), basically Pin AE1(TSEC_1588_PULSE_OUT1) and AF3(TSEC_1588_PULSE_OUT2) can source the 1PPS.

Am i correct??

When do you use the TSEC_1588_TRIG_INx and TSEC_1588_ALARM_OUTx and how do they work?

 

Q4. I need 1588 feature so EC2 wouldn't be used. Does EC2_GTX_CLK125(Pin AG4) still need to be applied with external 125MHz? Or Can be floated ro used for GPIO3_21?

 

I really do appreciate your help.

 

Thank you and hope you have nice day!

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NXP TechSupport
NXP TechSupport

2) You wrote:

> Why is secure boot programming necessary

It is not necessary.

Please refer to the LSDK Documentation:

https://docs.nxp.com/bundle/GUID-51EEFEDB-ABD5-40C0-BEBD-6527B3494D57/page/GUID-2E7EB525-F7DE-4382-A...

3) You wrote:

> What is this firmware?

Refer to the Aquantia documentation which has to be obtained directly from Aquantia.

> Does it have something to do with 1588?

No.

> Does NXP provide this firmware?

Yes:

https://github.com/NXP/qoriq-firmware-aquantia

5) As I already wrote: "If not used could be left unconnected."

A1) Yes, DDR SDRAM can be implemented without ECC.

A2) Only LS1046A 1588 timer is used.

A3) The LS1046A 1588 timer module clock is selected by the TMR_CTRL[CKSEL]

A4) The EC2_GTX_CLK125 should be provided only if RGMII2 interface is used.

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Contributor I

Thank you for your reply.

 

You mentioned that AQR107(10G PHY) has nothing to do with IEEE 1588.

Only LS1046A process and source signals regarding 1588.

 

I found out that AQR107 in LS1046ARDB is applied with 100MHz.

Please refer to the screenshot.

aqr107.jpg

What would be the purpose of XGT1588_CLK_N/P?

 

Thank you

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NXP TechSupport
NXP TechSupport

> What would be the purpose of XGT1588_CLK_N/P?

Please refer to the AQR107 Data Sheet.

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Contributor I

Hello, Ufedor

 

I'm afraid to say that It's quite obvious CLK_1588_N/P Pins of AQR107 are applied with clocks for 1588 in LS1046ARDB.

 

I read datasheet already before i posted the this and these two pins have only function - accepting the clock for 1588.

 

You mentioned that 1588 have nothing to do with AQR107. 

 

That means you don't need to apply clock, which is 100MHz, to CLK_1588_N/P.

 

Still, LS1046ARDB decided to apply these signals to the AQR107.

 

I'm afraid to say that here in NXP is the right place to ask about this, not else where.

 

Thank you.

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NXP TechSupport
NXP TechSupport

The clocks in question are connected because they are specified in the AQR107 Data Sheet.

The AQR107 IEEE1588-related functionality is not used in the NXP LSDK.

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Contributor I

Hello, Uferdor

 

 

Thank you for your reply.

 

I checked AQR107 Datasheet and reference manual and schematic and they connect these clocks just because of the 1588.

 

Your comment sounds like you connect these clocks without specific reasons, just because AQR107 Datasheet mentioned. Still AQR107 has nothing to do with 1588.

 

In this case, these clocks are meaningless. 

Would you give me comments on whether these lines are necessary or not?

 

Also, i found application note called AN4326_Verification of the IEEE 1588 Interface

 

Q1. Does it apply to LS1046A(RDB) as well?

Q2. Is there other application notes regarding 1588 and its waveform?

Q3. LS1046A has two 1588 out pins called TSEC_1588_PULSE_OUT1/2.

If we apply 100MHz to TSEC_1588_CLK_IN, can we get 1PPS Out via TSEC_1588_PULSE_OUT1/2?

Do TSEC_1588_PULSE_OUT1/2 source the same signal? Like synchronized with each other?

 

Thank you and i hope you have a great day!

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