LS1043A HRESET

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LS1043A HRESET

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肆加贰
Contributor I

We use the LS1043A chip, PORESET reset signal will become high after a low level, but HRESET is always low (HRESET pull-up 1.8V), may I ask what may be caused? (Refer to the timing diagram HRESET should also have a low level and then go high)

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r8070z
NXP Employee
NXP Employee


Have a great day,

PORESET is a LS1043A input and its signal is applied externally; while HRESET is bidirectional. It is driven by the LS1043A during HRESET sequence and if there is problem the device reset sequence is halted indefinitely. It happens if the PBL cannot loads the RCW or it can load but loaded RCW is wrong and the device PLL cannot lock or it cannot lock because proper SYSCLK is not applied or the PLL power is not clean.

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