How PBL branches to Boot code (Example boot code is in DDR SRAM)..?
Layerscape processors uses SCRATCHRW2 register value as boot location pointer. See the Section
12.3.53 of LS1043a Reference Manual.
Usually RCW file in NXP LSDK contains the following code for u-boot address:
write 0x570600, 0x00000000
write 0x570604, 0x60100000