As you could see, ERR_DETECT register has a number of specific errors that can be detected by the memory controller. Mainly those are ECC related bits. In case of such errors, the DDR controller sets up corresponding error bits and asserts interrupt signal (if enabled). Also it captures the address and attributes of the erroneous operation. If you do not use ECC feature, nothing from mentioned above can happen.
Note that the memory controller itself (without ECC) can not know if it reads correct data or not. What you can do is to run memory tests and check if data read matches previously written data.
Regards,
Bulat