Enabling L1 and L2 cache on T2080

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Enabling L1 and L2 cache on T2080

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stevenstarnes
Contributor III

Hello,

   I am trying to enable and use the L1 and L2 cache on the T2080. I followed the instructions in  the EREF 6500 and first invalidate the L2 and then enable it and then invalidate the L1 and enable it. However when debugging and looking at the cache view there are no words being loaded into the caches. Do I need to enable anything else besides the L1 and L2? Also in the cache view all addresses say they are not valid is this correct?

Thank you

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r8070z
NXP Employee
NXP Employee


Have a great day,

>I followed the instructions in  the EREF 6500 and
>first invalidate the L2 and then enable it and then
> invalidate the L1 and enable it.

The e6500 Core Reference Manual says that the L2 cache is disabled at start-up (L2CSR0[L2E] = 0) and when the L2 cache has been enabled, software must  properly flash invalidate it. After L2 initialization in the same way the L1 must be enabled first  and then invalidated.

Also you should check that accessed memory is not marked as caching-inhibited in the MMU pages.

You may see the u-boot source as example of code to enable the e6500 caches. For example see

https://github.com/qoriq-open-source/u-boot/blob/master/arch/powerpc/cpu/mpc85xx/start.S

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