When I run the DDR validation tool, I don't see any scenarios for the 'Validation Stage'. I want to use these scenarios to properly configure the DDR3L chip I am using. I am using CodeWarrior for ARMv8 targeted at the LS1012A processor. Is there anything I need to do to get these scenarios to appear?
Thanks for your help.
DDR controller from LS1012 board doesn't provide wrlv clock adjust and there are no registers for that. We don't have in this moment an algorithm for DDR tuning for this SoC.
Adrian
Do you have any suggestions as to debug or tune a DDR chip with the LS1012?
The DDR controller for LS1012 is very simple, so a working DDR configuration is enough for having a good configuration. Controller doesn't provide a way for fine tuning, it will just work or not.
Adrian