Switches on PSC9131RDB

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Switches on PSC9131RDB

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Switches on PSC9131RDB

I recently tried to update U-boot on the PSC9131RDB and struggled for a while with the DIP switches on the board. I thought I'd write up a few pointers in case you try to attempt this yourself. DIP switches for the PSC9131RDB are described on Infocenter here: http://www.freescale.com/infocenter/topic/QORIQSDK/4227333.html

A couple of points about the switches and jumpers worth considering:

  • Make sure you read the solder mask on the board. The switches are numbered upside down from what you might expect.

  • SW6[3:4] describe how the JTAG chain is setup on the board. The Starcore and Power cores can be chained in the same scan chain, or separated. If this is set to 11, a side effect is that the NAND flash is write protected.

  • Input clock to the 9131 can either be 66Mhz or 100MHz. Images are built to a specific input clock, so make sure you are using an image for the clock your board is set to. Jumper J16 (near the SMA connectors) configured the input clock to the processor. If the jumper is on, the input clock is 66MHz. If it is off, it's 100MHz.

  • The clock PLL ratios are multiples of the input clock. CCB clock = the input clock * a multipler. The core frequency = CCB clock * multiplier. All of the multiplers are located in the DIP switches and must be changed if you move from an image built for 66MHz to an image built for 100MHz.

    • For example: For a 66MHz input clock, my CCB multiplier = 6:1, so my CCB clock = 400MHz. My core multiplier = 2:1, so my core frequency = 400MHz * 2 = 800MHz. If I were to just switch the input clock to 100MHz with these settings, I'd be running my CCB at 100*6 = 600MHz, and my core at 1.2GHz (which violates the processor's spec's!).

  • Lastly, the board is built with both SPI and NAND flash. You can boot from either. It's either / or, and the images are built differently, so make sure you have the correct image for what you're attempting. If you happen to have an image burnt into both of the flash devices (SPI and NAND) you may select which to use at boot through SW4[ROM_LOC]. This can be set to 0b0110 for SPI, or 0b1001 for NAND.
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‎02-11-2014 12:47 PM
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