Setting S12ZVLA128 VDD Level

[bigtwisty]

VDD on this uC is defaulted to 3.3V.  To switch it to 5V there is a bit in the CPMUVREGCTL register.  Processor Expert provides the ability to set all other editable bits in this register through it's standard interface, but not that one.

I ended up putting the following in my main() routine:

// Change VREG from 3.3V (default) to 5V 

setReg8Bits(CPMUVREGCTL, 0x80);

This works perfectly when I am debugging, but as soon as I power cycle the module everything else works but VDD is still at 3.3V.

1. Is there some way I am missing to do this properly through Processor Expert or is this just something that fell through the cracks on NXP's part?
2. Why does this work while debugging, but not when running independently?

Thanks in advance.

[pingwang]

I have the same issue.  You can changed it in Cpu.c , but when you complied the project next time,It will become default by PE. It looks like PE's bug

[bigtwisty]

I found in the RM that this pin is Write Once in normal mode.  If you write it once before you initialize PE it will work in normal mode because PE will be unable to override the value.  If you also write it after you initialize PE it will override the PE settings when debugging.  You need to ensure you write the entire register correctly however, as PE will be unable to write the register again in normal mode.