SDHC_LDD and CRC

[anguel]

Hi!

I am looking at the SDHC_LDD component and the code generated by processor expert. It looks like the code does not enable the command index check (CICEN) and the CRC check (CCCEN) supported internally by the SDHC controller, i.e. the enable bits in the SDHC_XFERTYP register are not set. Is there any special reason for this?

UPDATE:

Looks like in C:\Freescale\CW MCU v10.4\MCU\ProcessorExpert\lib\Kinetis\pdd\inc\SDHC_PDD.h the definitions for the checks exist:

/* Command CRC check */

#define SDHC_PDD_ENABLE_CRC_CHECK  SDHC_XFERTYP_CCCEN_MASK /**< Enable CRC check. */

#define SDHC_PDD_DISABLE_CRC_CHECK 0U            /**< Disable CRC check. */

/* Command index check */

#define SDHC_PDD_ENABLE_INDEX_CHECK  SDHC_XFERTYP_CICEN_MASK /**< Enable index check. */

#define SDHC_PDD_DISABLE_INDEX_CHECK 0U          /**< Disable index check. */

But when I look at Transfer() in SDHC.c these check parameters are not passed for some reason I do not understand. Why is this???

Regards,

Anguel

[LadislavVadkerti]

Hello,

not every command supports the CRCs. It depends on the command response type, which types of CRCs should be enabled (described in the reference manual at the beginning of the SDHC_XFERTYP register's description). Processor Expert's SDHC_LDD component does not support this feature yet.

Best regards,

Ladislav Vadkerti

Freescale Processor Expert Team

[anguel]

not every command supports the CRCs.

Where do you see this? This doc says that EVERY command supports CRC:
https://www.sdcard.org/downloads/pls/simplified_specs/part1_410.pdf

It depends on the command response type, which types of CRCs should be enabled (described in the reference manual at the beginning of the SDHC_XFERTYP register's description). Processor Expert's SDHC_LDD component does not support this feature yet.

The CCCEN bit enables the CRC check on Kinetis SDHC controller and as far as I understand the controller then does the CRC automatically. And as far as I understand the SDHC_LDD component is already prepared to handle CRC, you are just not passing the CCCEN flag. Why not just add the flags for example like this:

	SDHC_PDD_SendCommand(SDHC_BASE_PTR,
	((DeviceDataPrv->TransferOperation == LDD_SDHC_READ) ?
	(uint32_t)((DeviceDataPrv->TransferBlockCount > 1U) ?
	SDHC_PDD_CMD18_READ_MULTIPLE_BLOCK : SDHC_PDD_CMD17_READ_SINGLE_BLOCK) :
	(uint32_t)((DeviceDataPrv->TransferBlockCount > 1U) ?
	SDHC_PDD_CMD25_WRITE_MULTIPLE_BLOCK : SDHC_PDD_CMD24_WRITE_BLOCK)),
	((DeviceDataPrv->TransferBlockCount > 1U) ?
	(SDHC_PDD_ENABLE_BLOCK_COUNT | SDHC_PDD_ENABLE_AUTO_CMD12 | SDHC_PDD_MULTIPLE_BLOCK) : 0U) |
	SDHC_PDD_ENABLE_DMA | SDHC_PDD_DATA_PRESENT | SDHC_PDD_ENABLE_CRC_CHECK | SDHC_PDD_ENABLE_INDEX_CHECK | SDHC_PDD_RESPONSE_LENGTH_48 |
	((DeviceDataPrv->TransferOperation == LDD_SDHC_READ) ?
	SDHC_PDD_DATA_READ : SDHC_PDD_DATA_WRITE));

[LadislavVadkerti]

I'm sorry, my answer was not clear. Yes, every command contains a CRC field. But that field is checked by the card and if it does not match, a CRC error is reported by the card (in a card status response). If the CRC and command index checks are enabled, CRC and command index are checked in the command response. But not every command is followed by a response and some responses does not contain a CRC field (from the SD spec.: "The CRC7 check is used for all commands, for all responses except type R3..."). What should be done in the SDHC_LDD code is to enable the checks as you wrote in all of the SendCommand macro calls according to what type of response is expected.

Ladislav Vadkerti

Freescale Processor Expert Team

[anguel]

Thank you for the clarification. When I look at the complex SDHC_LDD code I see all complex kinds of checks being done there and very complex evaluation schemes. So I just do not understand why important things like CRC are not added. Are there any plans to add this?

Anguel

[LadislavVadkerti]

I have filed a request to support it.

Ladislav Vadkerti

Freescale Processor Expert Team

[anguel]

Thank you Ladislav. Right now I am fighting with a very annoying related problem I have described here:

High-speed SDHC = LDD_SDHC_ERR_TIMEOUT

It is related to SDHC_LDD but I suppose that it may be related to some hardware problem, so I have entered it in the Kinetis forum. It may be also some bug in the Processor Expert code, I don't know...