[LS1028a]: Could not able to transfer block of data from processor to FPGA using qDMA driver.

[Amit_Keshri]

Hi NXP support Team,

We have a LS1028A based custom board in which PCIe is connected to IGLOO2 FPGA as shown in attached block diagram.

We want to transfer block of data from Processor to FPGA using PCIe ,for this we are using driver/dma/dmatest.c default driver file.

We are following LSDK 21.08  document section 7.2.11 to test qdma driver and enable qDMA related things in .config files and changed dtsi files as shown below:

Device Drivers --->
[*] DMA Engine support ---> --->
<*> Freescale qDMA engine support

CONFIG_FSL_QDMA =y

-----------

Dtsi file change for qDMA:

qdma: qdma@8380000 {
compatible = "fsl,ls1028a-qdma";
reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
<0x0 0x8390000 0x0 0x10000>, /* Status regs */
<0x0 0x83a0000 0x0 0x40000>; /* Block regs */
interrupts = <0 153 0x4>,
<0 39 0x4>;
interrupt-names = "qdma-error", "qdma-queue";
channels = <8>;
queues = <2>;
status-sizes = <64>;
queue-sizes = <64 64>;
big-endian;
};

-----------------

QDMA for platform with DPAA2:

Device Drivers --->
[*] DMA Engine support ---> --->
<*> NXP DPAA2 QDMA

CONFIG_FSL_DPAA2_QDMA = y

-------------

In Linux prompt we are inserting dmatest.ko file using lsmod command and we are running below command according to  LSDK 21.08  document section 7.2.11 :

echo 1024 > /sys/module/dmatest/parameters/test_buf_size;
echo 4 > /sys/module/dmatest/parameters/threads_per_chan;
echo 2 > /sys/module/dmatest/parameters/max_channels;
echo 100 > /sys/module/dmatest/parameters/iterations;
echo 1 > /sys/module/dmatest/parameters/run

1st 4 command is getting executed successfully but echo 1 > /sys/module/dmatest/parameters/run

is not getting exceuted successfully and getting below error:

dmatest: No channels configured, continue with any

I have attached diagram for PCIe and log file with this mail.

Please help us on this.

Regards,

Amit Keshri

[yipingwang]

The dts configuration is incorrect, please refer to the following.

  qdma: dma-controller@8380000 {

                        compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";

                        reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */

                              <0x0 0x8390000 0x0 0x10000>, /* Status regs */

                              <0x0 0x83a0000 0x0 0x40000>; /* Block regs */

                        interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,

                                     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;

                        interrupt-names = "qdma-error", "qdma-queue0",

                                "qdma-queue1", "qdma-queue2", "qdma-queue3";

                        dma-channels = <8>;

                        block-number = <1>;

                        block-offset = <0x10000>;

                        fsl,dma-queues = <2>;

                        status-sizes = <64>;

                        queue-sizes = <64 64>;

                };

[Amit_Keshri]

Hi Yipingwang,

Thank you very much for your reply.

and sorry for late response.

I have modified my dtsi file according to your suggestion and after that able to run

echo 1 > /sys/module/dmatest/parameters/run command.

We have configured FPGA as PCIe End point,in which fpga memory BAR0 address connected with BRAM memory.

But now we want to transfer bulk of data from Processor to BRAM memory.

for this what modification is required in /dma/dmatest.c driver file and how i can test bulk data transfer from processor BRAM memory??.

Please help us on this.

Regards,

Amit Keshri

[yipingwang]

Here is a patch we used to test qdma for memory and pcie transfer. You can try it.

[Amit_Keshri]

Hi @yipingwang ,

Thank you for your response.

I will check and update you on this.

Regards,

Amit Keshri