what‘s problem about fs26 debug pin connect VBOS directly?

[yang_yang3920]

[yipingwang]

it’s risky and often wrong to tie the FS26 DEBUG pin directly to VBOS, because the DEBUG pin is not a power input—it is a logic/debug interface pin with strict voltage and driving requirements.

DEBUG pin must be driven by a controlled logic level (VDIG domain), never directly tied to VBOS.

[yang_yang3920]

debug pin connect VBOS directly will cause fs26 enter OTP mode permanently , can't exit debug by sending spi exit-debug command, correct ? where can find this proof in fs26 date sheet?

[yipingwang]

Please put fs26 related question in the following block.

https://community.nxp.com/t5/Power-Management/bd-p/Power-Management