power on configuration values latching problem in mpc885

[Pamid]

At power on ebdf  and others are not updating . clk out is 18.75MHz instead of 37.5MHz. Modck is 11 at power on reset. If we see in debug mode PLPRCR ( EBDF) is 00 only instead of 01. Data bus(0:15) transitions are  as per configuration set values  with respect to Hard reset, but not latching into the processor. PLL is locking to 18.75MHz/75mhz. Please clarify. Once in a while it is locking to 37.5mhz and immediately  to 18.75mhz.

[alexander_yakov]

Please connect TRST pin to ground directly or via strong (1K or less) resistor and check again.

Have a great day,
Alexander
TIC

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[Pamid]

trst is pulled down to 1kohm. also tried by connecting gnd to trst. Problem remains same. If i see hard reset config values in view registes by connecting tab. It is showing wrong values.SIUMCR it is showing all zeroes. If  i activate the debug by  connect. hardreset should not generate .But it is giving hard reset also. If i load the configuration file it is not giving hardreset.  i am able to run the code in debug mode.why hardreset is coming in debug connect case,though it is accessing internal register.