MPC8379 Sata driver problems

[carlessilva]

I've developed a NVR using the MPC8379. We are using the four Sata interfaces to connect 4 Hard Disks. However I'm experiencing communication errors while reading high rates of information of those disks (For example while rebuilding a RAID)

The registers I've programmed are the following:

• Serdes:
  • CPU_SRDS_RESTCTL --> 0x00444500
  • CPU_SRDS_RESTCTL --> 0x0000000F
  • CPU_SRDS_RESTCTL --> 0x00444500
  • CPU_SRDS_CR1 --> 0x00000000
  • CPU_SRDS_CR2 --> 0x00001414
  • CPU_SRDS_CR3 --> 0x15150505
  • CPU_SRDS_CR4 --> 0x00000808
  • CPU_SRDS_RESTCTL --> 0x80000000
• SATA

  • CPU_SATA_H_STATUS --> 0xFFFFFFFF

  • CPU_SATA_H_CONTROL --> 0

  • CPU_SATA_S_ERROR --> 0xFFFFFFFF

  • CPU_SATA_CHBA --> 0x88AB102 

  • CPU_SATA_S_CONTROL --> 0x10030000
  • CPU_SATA_H_CONTROL --> 0x3F050080

I program the 2 SerDes and the 4 SATA interfaces with the same registers. While rebuilding one drive from another I suddenly get an error in a Read communication, where CPU_SATA_H_STATUS has the following value: 0x230100A0.

I have no clue in what am I doing wrong. In normal writing and reading from the Hard drives I'm not experiencing any problem, only while rebuilding systems.

[ufedor]

Please check whether the TransCfg[RX_WATER_MARK] value is 0x16.

If "yes", can you please change it to 0x10 ant re-test.

Here is the location to modify the SATA watermarker level in U-Boot (./drivers/fsl_sata.c):  

out_le32(&reg>transcfg, 0x08000016);

It should be:

out_le32(&reg->transcfg, 0x08000010);

[carlessilva]

Thanks for your answer. It looks like it works, but won't it make it slower if you reduce the rxFifo?

[ufedor]

The RX FIFO size is fixed - it's just a watermark adjustment.