The P2020 is equipped with e500v2 cores, the core provides 36-bit addressing, i.e. can address 64GB of memory space. So 4GB of DDR is not a problem.
I would add that the MMU (Memory Management Unit) is responsible for translation of 32-bit accesses to 36-bit address space. Details can be found in the e500 reference manual, see section 12:
thanks，that is rigth.
but the effective address is 32 bit in p2020，it means that i can only use 4GB memory. where can i place other memory if i used all 4GB for ddr?
can i use on chip memory less than 4GB to access all the 4GB space of ddr simultaneously?