How is an ALU internally designed?

[timovanmanen]

Hello,

I'm a dutch high school student and I am participating in a program for talented students. This program is called HPG (honours program gymnasium). This means I have to work at a project of my own choice. My project is to get to know how the hardware of a computer operates. I already have come to know quite a bit, but I can't seem to find information on how an ALU is internally designed to know how to operate which operation in which order. It would help me very much if someone could tell me how a basic ALU works internally.  I don't really know if this is the right place to ask my question. If not, I would really appreciate it if someone could tell me a place/ person that could help me.

Sincerely,

Timo van Manen

[alexander_yakov]

This community is not a right place to ask these type questions, if these questions are not related to particular device from PowerQUICC family.

But is is not difficult to answer these questions "in general", as ALU block is similar in all processors.

Typical ALU block has three groups of inputs - operand 1, operand 2 and code of operation.

Operand 1 and 2 are two input operands for for ALU operation, code of operation is somehow encoded instruction for ALU what to do with these opcodes.

Also, ALU has two groups of outputs - result and flags. Result is result of operation, flags are: carry, zero/non-zero, sign, error, and etc. Also, ALU may have input flags - for cascading or to take the result of previous operation into account.

ALU does not decide which operation to perform and in which order, another unit in the processor is responsible for this - control unit. This control unit analyses program queue to dispatch operations between different operation units inside the processor ans instructs each operation unit which operation to perform.

Have a great day,
Alexander

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