How is MPC8309 SPMR initialised after hardware reset?

[ianwillats]

The MPC8309 Reference Manual (Rev. 2) section 4.5.2.1, System PLL Mode Register (SPMR) states:

It obtains its values according to the reset configuration input signal and
the reset configuration word low loaded during the reset flow. Note that this register is updated only during
a power-on reset sequence and not by a hard reset sequence. It may hold values different than those in the
RCWLR after a a hard reset sequence.

The register is also documented as being read-only.

Please clarify how the register is (re-)initialised after a hardware reset.  Under what circumstances might it have values different to those in the RCWLR, and what is the impact of any such changes?

Thanks,

Ian

[r8070z]

Have a great day,

Although the configuration reset words are loaded during hard reset flows, the clocks and PLL modes are reset only when PORESET is asserted during a power-on reset flow (see Table 4-4. Reset Actions in the manual). The values of fields in the reset configuration words registers (RCWLR and RCWHR) reflect their state during the hard reset flow. The SPMR obtains its values only during a power-on reset sequence and not by a hard reset sequence. As result it may hold values different than those in the RCWLR after a a hard reset sequence.

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[ianwillats]

Thanks Serguei.  Just to check I understood your answer: would it be true to say that if the RCWLR does not change between power-on reset and hard reset, the SPMR value will not change either?

[r8070z]

Yes, it is true.