Fixing the bone pile

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Fixing the bone pile

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joekimak
Contributor I

I have production board with 8247 processor configured as PCI Mode enabled, PCI_Host, PCI_arb_en, PCI_DLL disabled. master. Rstconfuration is ok. What would cause a 17usec delay of CS0_ after the Hreset goes high?

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lunminliang
NXP Employee
NXP Employee

Please send me your schematic for analysis by using direct message of community.

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