When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324, J-Li

[mgdsun2000]

mgdsun2000_0-1760361983680.png

The schematic diagram of the external Bipolar Junction Transistor (BJT) used between VDD_HV_A and V15 is shown in the figure above.

According to the above schematic diagram, when the LMBCTLEN field in the ConfigRegister is set to 1, J-Link becomes unable to read register values after the code execution reaches the part marked with a circle in the figure below.

mgdsun2000_1-1760362038037.png

The status of registers of S32K324 read by J-Link is shown in the figure below.

mgdsun2000_2-1760362590904.png

Could you please tell me the cause of the above-mentioned problem and how to solve it?

[RafaR]

Hello mgdsun2000

Good day!

Okay, let's do some tests to see what options we have.

Avoid setting LMBCTLEN = 1 during development/debug sessions. This keeps V15 powered and maintains J-Link access.

If LMBCTLEN must be enabled for production or power-saving reasons

Add a delay or conditional check to activate it only after all debug operations are complete.

Ensure V15 remains powered even when LMB is disabled

If available, switch to a debug interface that doesn't rely on V15

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

[mgdsun2000]

Thank you very much for your explanations.

    “Avoid setting LMBCTLEN = 1 during development/debug sessions. This keeps V15 powered and maintains J-Link access.”    According to your reply, does using an external V15 mean that the debug interface cannot be used? Logically, when LMBCTLEN is set to 1, V15 should remain powered, just switching from internal to external V15. Then why does the J-Link debugging disconnect?

     Additionally, I haven't found more detailed information about the specific power supply domains of the internal power supply modules in the S32K324 chip, and I'm not sure which power domain the debug interface belongs to. Could you provide more specific materials?
      Furthermore, when I debug the S32K324, I first debug the M7_0 core. When LMBCTLEN = 1, the J-Link disconnects, but I can attach the J-Link (SWD) to the M7_1 core normally for debugging. Why does the debugging of the M7_0 core get disconnected?

[mgdsun2000]

When an external Bipolar Junction Transistor (BJT) is used between VDD_HV_A and V15 in S32K324, J-Link loses the ability to emulate the chip once the LMBCTLEN field is set to 1.