VR5510 PMIC stand alone usage

[K_Steinhammer]

In the data sheet of the VR5510 it is mentioned that the PMIC can be used without a CPU.

Is there some documentation about dos and don'ts for this use case?
I would be interested in:

• details about the the state machine and or flow charts, as I can't find info about the differences in state machines of QM vs. ASIL devices (yes, I am aware of chapter 22.2 and Table 44).
• necessary OTP settings to enable this use case

Thanks

[K_Steinhammer]

There is no S32Gx in the design. In fact I am evaluating to use the VR5510 as high voltage PMIC to power a complete PCB with other low-voltage PSUs connected to Vpre. My concern was, if I need to connect the VR5510 to an I2C master and if there is the need to interact with the PMIC (driver development, SW debugging,...)

But if I understood you right, then there is no reason the VR5510 must be connected via I2C if used in a QM variant...

One further question: Is the voltage supervisor available in a QM variant (it is not listed in Table 44)?

[TomasVaverka · Accepted solution]

Hello Klaus,

Thanks for sharing more details about your use case. 

If standby mode is not needed, I2C communication is not mandatory. I2C can help debug or diagnose the source of the faults.

The voltage supervisor is available for QM devices. Please check the attached QM MAH OTP setting, the voltage supervisor are enabled. 

Best regards,

Tomas

[TomasVaverka]

Hello Klaus,

May I know whether your application is attach S32Gx design or not? Do you need to define a custom OTP configuration or you want to use our Standard version QM device like MVR5510AMMAHES?

1. For QM version device, WD refresh is not needed, so the Fail-safe state after INIT_FS can be ignored.

2. If you need to define a custom version OTP configuration, you need to use VR5510 GUI to configurate the OTP setting. If you need to change a ASIL-D version OTP to QM version OTP , you just need to select the Device type as QM version by GUI. And the safety features which are not supported by QM parts can be disabled, just as shown in Table 44.

Best regards,

Tomas