Hi Jozef, Since these boards are already manufactured, we are trying to do a minimum correction. The lowest step was to put the 3V3 VREFB through a 10K res. (Currently, it is connected directly to 3V3). This caused the module to work fine. In the furure versions, we will put the 200K res and reduce the pull up res values to no pull up on the 1.8V and 1.15K on the 3V side. But currently, I have 10K pull ups on the 1.8V side and 10K pull ups on the 3V3 side. I also have 10K between the EN and 3V3 and the same 10K between VREFB and 3V3. We have tested the board and this configuration is working fine with the UART communication, as well as the voltages.
Can you confirm what is the importance to no pull up (instead of 10K) on the 1.8V side, 1.15K pull up (instead of 10K) on the 3V3 side and the 200K between the VREFB and 3V3 (instead of 10K)? The reason all were 10K is due to the ordering volume benefit. Thanks.