FS85: About MCU fault recovery strategy

[Kojimaa]

Hi NXP,

  What I want to know about this strategy is whether FS0B automatically becomes high after meeting the recovery conditions, or does it need to be released again via software ?

Thank you  in advance

[guoweisun]

When the fail-safe outputs FS0B is asserted low by the device due to a fault, the exit

conditions must be validated before allowing these pins to be released.

These conditions are:

• Fault is removed
• LBIST_OK = ABIST1_OK = ABIST2_OK = 1
• Fault Error Counter = 0
• RELEASE_FS0B register filled with ongoing WD_SEED reversed and complemented

[Kojimaa]

Hello,

    Do I also need to release FS0B again via software after FCCU recovered during the recovery window?

[guoweisun]

For the SBC side to release FS0B:

• Fault is removed
• LBIST_OK = ABIST1_OK = ABIST2_OK = 1
• Fault Error Counter = 0
• RELEASE_FS0B register filled with ongoing WD_SEED reversed and complemented

Firstly fault should be removed, then read the related registers to make sure LBIST_OK = ABIST1_OK = ABIST2_OK = 1 and Fault error counter=0 then fill the RELEASE_FS0B registers to release FS0B.