Hi, I don't know where to obtain these exact numbers. I know it's a MPC8540 PowerQUICCIII with an e500 core. Another question is also, if there is a memory between the Ethernet controller and the MPU where Ethernet frames were hand over to the TCP/IP stack. Which should be significant larger? Or does this happen already in the usual RAM?
I found this document about the eTSEC controller: Use the Enhanced Triple-Speed Ethernet Controller (eTSEC) Is the information Im looking for on page 18, or refer this TX/RX cache more to a buffer within the driver or TCP/IP stack?