Power Down Cycle

[danielminors]

In the datasheet  P1011EC, P1011 QorIQ Integrated Processor Hardware Specification section 2.3 Power Down Requirements it states;

"The power-down cycle must complete such that power supply values are below 0.4 V before a new power-up cycle can be started."

Is this true for all the power rails or just the Core and platform supply voltage and PLL supply?

[alexander_yakov]

Yes, this requirement is for all power supplies.

Have a great day,
Alexander
TIC

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